From patchwork Wed Sep 5 11:58:51 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Ujfalusi X-Patchwork-Id: 1409021 Return-Path: X-Original-To: patchwork-linux-omap@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by patchwork1.kernel.org (Postfix) with ESMTP id 5EE7640220 for ; Wed, 5 Sep 2012 11:59:14 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752226Ab2IEL7H (ORCPT ); Wed, 5 Sep 2012 07:59:07 -0400 Received: from na3sys009aog124.obsmtp.com ([74.125.149.151]:44314 "EHLO na3sys009aog124.obsmtp.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1757421Ab2IEL7B (ORCPT ); Wed, 5 Sep 2012 07:59:01 -0400 Received: from mail-yx0-f174.google.com ([209.85.213.174]) (using TLSv1) by na3sys009aob124.postini.com ([74.125.148.12]) with SMTP ID DSNKUEc+hKI7mPqukJpUKMZu83bulNm7TiUM@postini.com; Wed, 05 Sep 2012 04:59:01 PDT Received: by yenl14 with SMTP id l14so51374yen.19 for ; Wed, 05 Sep 2012 04:58:55 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references :x-gm-message-state; bh=G1aIj7O5eF6niCcv3ABZBrOj7X/cPHwxSq/O1UZe1Ps=; b=nbxgzGrQ41oRyTAbRbgM3qfMnAKBc6pynWI3HZGsJPUs+vpkBsbHllzTCrFWbaaxXf 60xDIiPjiKtM/1zxG5d+hFvPA/Jt3/fXhEjO7RKepOQEXZkFVS6oNdJJSBklcs7jCgXP 3hvvkIM8mEKQztqD651/MAZuJ53f+mLhTU7oVH/7b2SLYywmGNqwxG8ZU2SdXaLhpQ9g zfSpez8HqUFJWTzgXraL96F8j9ZLDJEhEFyIuQOMvU4KUVmy79unqAw+TGrHu3rju4e7 KBMoWlB706SsNuhoC1RiaiDvolKomtBoNMNFJmDoNKVdkiw8poC6dsT08nf77p3UWZ3s nxzA== Received: by 10.236.127.199 with SMTP id d47mr22872001yhi.11.1346846335581; Wed, 05 Sep 2012 04:58:55 -0700 (PDT) Received: from barack.emea.dhcp.ti.com (dragon.ti.com. [192.94.94.33]) by mx.google.com with ESMTPS id h8sm1450364ank.9.2012.09.05.04.58.47 (version=SSLv3 cipher=OTHER); Wed, 05 Sep 2012 04:58:49 -0700 (PDT) From: Peter Ujfalusi To: Tony Lindgren , Benoit Cousson Cc: linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree-discuss@lists.ozlabs.org Subject: [PATCH v3 3/8] ARM/dts: omap3: Add McBSP entries Date: Wed, 5 Sep 2012 14:58:51 +0300 Message-Id: <1346846336-27321-4-git-send-email-peter.ujfalusi@ti.com> X-Mailer: git-send-email 1.7.12 In-Reply-To: <1346846336-27321-1-git-send-email-peter.ujfalusi@ti.com> References: <1346846336-27321-1-git-send-email-peter.ujfalusi@ti.com> X-Gm-Message-State: ALoCoQl4lEtQFzNUnfJm2uKhZLTwtV8qrE07Y4ZtrB7CF5YZzNNemnEwXJVldG1YGF9EFw+07pNv Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org Create the needed sections to be able to probe McBSP ports via DT. Signed-off-by: Peter Ujfalusi --- arch/arm/boot/dts/omap3.dtsi | 69 ++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 69 insertions(+) diff --git a/arch/arm/boot/dts/omap3.dtsi b/arch/arm/boot/dts/omap3.dtsi index 8109471..f024bb3 100644 --- a/arch/arm/boot/dts/omap3.dtsi +++ b/arch/arm/boot/dts/omap3.dtsi @@ -220,5 +220,74 @@ compatible = "ti,omap3-wdt"; ti,hwmods = "wd_timer2"; }; + + mcbsp1: mcbsp@48074000 { + compatible = "ti,omap3-mcbsp"; + reg = <0x48074000 0xff>; + reg-names = "mpu"; + interrupts = <16>, /* OCP compliant interrupt */ + <59>, /* TX interrupt */ + <60>; /* RX interrupt */ + interrupt-names = "common", "tx", "rx"; + interrupt-parent = <&intc>; + ti,buffer-size = <128>; + ti,hwmods = "mcbsp1"; + }; + + mcbsp2: mcbsp@49022000 { + compatible = "ti,omap3-mcbsp"; + reg = <0x49022000 0xff>, + <0x49028000 0xff>; + reg-names = "mpu", "sidetone"; + interrupts = <17>, /* OCP compliant interrupt */ + <62>, /* TX interrupt */ + <63>, /* RX interrupt */ + <4>; /* Sidetone */ + interrupt-names = "common", "tx", "rx", "sidetone"; + interrupt-parent = <&intc>; + ti,buffer-size = <1280>; + ti,hwmods = "mcbsp2"; + }; + + mcbsp3: mcbsp@49024000 { + compatible = "ti,omap3-mcbsp"; + reg = <0x49024000 0xff>, + <0x4902a000 0xff>; + reg-names = "mpu", "sidetone"; + interrupts = <22>, /* OCP compliant interrupt */ + <89>, /* TX interrupt */ + <90>, /* RX interrupt */ + <5>; /* Sidetone */ + interrupt-names = "common", "tx", "rx", "sidetone"; + interrupt-parent = <&intc>; + ti,buffer-size = <128>; + ti,hwmods = "mcbsp3"; + }; + + mcbsp4: mcbsp@49026000 { + compatible = "ti,omap3-mcbsp"; + reg = <0x49026000 0xff>; + reg-names = "mpu"; + interrupts = <23>, /* OCP compliant interrupt */ + <54>, /* TX interrupt */ + <55>; /* RX interrupt */ + interrupt-names = "common", "tx", "rx"; + interrupt-parent = <&intc>; + ti,buffer-size = <128>; + ti,hwmods = "mcbsp4"; + }; + + mcbsp5: mcbsp@48096000 { + compatible = "ti,omap3-mcbsp"; + reg = <0x48096000 0xff>; + reg-names = "mpu"; + interrupts = <27>, /* OCP compliant interrupt */ + <81>, /* TX interrupt */ + <82>; /* RX interrupt */ + interrupt-names = "common", "tx", "rx"; + interrupt-parent = <&intc>; + ti,buffer-size = <128>; + ti,hwmods = "mcbsp5"; + }; }; };