From patchwork Thu Sep 6 12:12:11 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Ujfalusi X-Patchwork-Id: 1413821 Return-Path: X-Original-To: patchwork-linux-omap@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by patchwork2.kernel.org (Postfix) with ESMTP id 745E9DFFCF for ; Thu, 6 Sep 2012 12:15:36 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753364Ab2IFMMW (ORCPT ); Thu, 6 Sep 2012 08:12:22 -0400 Received: from na3sys009aog133.obsmtp.com ([74.125.149.82]:41325 "EHLO na3sys009aog133.obsmtp.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753090Ab2IFMMS (ORCPT ); Thu, 6 Sep 2012 08:12:18 -0400 Received: from mail-ob0-f174.google.com ([209.85.214.174]) (using TLSv1) by na3sys009aob133.postini.com ([74.125.148.12]) with SMTP ID DSNKUEiTIWKR3R45PxiAUPo1FwySrqbfEP29@postini.com; Thu, 06 Sep 2012 05:12:18 PDT Received: by obbuo13 with SMTP id uo13so2296681obb.19 for ; Thu, 06 Sep 2012 05:12:17 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references :x-gm-message-state; bh=XKW7Hls+SOCNGTOKd3jwySTj4GgGUj678H5clMBsDKs=; b=ch4RzLMQL9D3y7K3Aq3vC+Bi+xLP4yLH6N6kRELEpiKY6CCDL9WVex00bINCmcvMBK omxjmolJm58damMKs1D7NPbv4ORLZUNyMhQJMS4tLYd499KyeqLfRD19GMnyIX+uPxIm jBTP6zI09il1E6q6yqb0mtcXGanRLvUAJEWlxf3dMZd6Yx/Te8MiGdle2QL2QmcBe4je zZ+U9vWhScMolREDlD6PgtjnDMryP0tnTrVJypuOnmQCHhUEuex82DhQhyimdDzhfTv9 W1k7FWLnrDVWKOtGAQth8GDgFuIzqQ+uizxZSnsSLQg1FOAz//Gyq0TmynScDJ+ur8Zw nwrg== Received: by 10.60.24.7 with SMTP id q7mr1651097oef.54.1346933537060; Thu, 06 Sep 2012 05:12:17 -0700 (PDT) Received: from barack.emea.dhcp.ti.com (dragon.ti.com. [192.94.94.33]) by mx.google.com with ESMTPS id zn9sm1795856obb.23.2012.09.06.05.12.13 (version=SSLv3 cipher=OTHER); Thu, 06 Sep 2012 05:12:16 -0700 (PDT) From: Peter Ujfalusi To: Mark Brown , Liam Girdwood , Tony Lindgren , Samuel Ortiz , Dmitry Torokhov , Grant Likely , Rob Herring Cc: Tero Kristo , alsa-devel@alsa-project.org, linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree-discuss@lists.ozlabs.org, Benoit Cousson , linux-kernel@vger.kernel.org Subject: [PATCH v3 04/14] MFD: twl-core: Add API to query the HFCLK rate Date: Thu, 6 Sep 2012 15:12:11 +0300 Message-Id: <1346933541-21547-5-git-send-email-peter.ujfalusi@ti.com> X-Mailer: git-send-email 1.7.12 In-Reply-To: <1346933541-21547-1-git-send-email-peter.ujfalusi@ti.com> References: <1346933541-21547-1-git-send-email-peter.ujfalusi@ti.com> X-Gm-Message-State: ALoCoQkd7PVr81nrbr4nCoMN8p0lajfE2+WusQSqZbdmiaWh/9ot63djoK6mr+9phOtmeXs+ug+3 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org CFG_BOOT register's HFCLK_FREQ field hold information about the used HFCLK frequency. Add possibility for users to get the configured rate based on this register. This register was configured during boot, without it the chip would not operate correctly, so we can trust on this information. Signed-off-by: Peter Ujfalusi --- drivers/mfd/twl-core.c | 32 ++++++++++++++++++++++++++++++++ include/linux/i2c/twl.h | 1 + 2 files changed, 33 insertions(+) diff --git a/drivers/mfd/twl-core.c b/drivers/mfd/twl-core.c index 1c32afe..f162b68 100644 --- a/drivers/mfd/twl-core.c +++ b/drivers/mfd/twl-core.c @@ -552,6 +552,38 @@ int twl_get_version(void) } EXPORT_SYMBOL_GPL(twl_get_version); +/** + * twl_get_hfclk_rate - API to get TWL external HFCLK clock rate. + * + * Api to get the TWL HFCLK rate based on BOOT_CFG register. + */ +int twl_get_hfclk_rate(void) +{ + u8 ctrl; + int rate; + + twl_i2c_read_u8(TWL_MODULE_PM_MASTER, &ctrl, R_CFG_BOOT); + + switch (ctrl & 0x3) { + case HFCLK_FREQ_19p2_MHZ: + rate = 19200000; + break; + case HFCLK_FREQ_26_MHZ: + rate = 26000000; + break; + case HFCLK_FREQ_38p4_MHZ: + rate = 38400000; + break; + default: + pr_err("TWL4030: HFCLK is not configured\n"); + rate = -EINVAL; + break; + } + + return rate; +} +EXPORT_SYMBOL_GPL(twl_get_hfclk_rate); + static struct device * add_numbered_child(unsigned chip, const char *name, int num, void *pdata, unsigned pdata_len, diff --git a/include/linux/i2c/twl.h b/include/linux/i2c/twl.h index 7ea898c..ac6488c 100644 --- a/include/linux/i2c/twl.h +++ b/include/linux/i2c/twl.h @@ -188,6 +188,7 @@ int twl_i2c_read(u8 mod_no, u8 *value, u8 reg, unsigned num_bytes); int twl_get_type(void); int twl_get_version(void); +int twl_get_hfclk_rate(void); int twl6030_interrupt_unmask(u8 bit_mask, u8 offset); int twl6030_interrupt_mask(u8 bit_mask, u8 offset);