From patchwork Thu Sep 13 10:20:49 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lorenzo Pieralisi X-Patchwork-Id: 1451201 Return-Path: X-Original-To: patchwork-linux-omap@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by patchwork2.kernel.org (Postfix) with ESMTP id 761A9DF24C for ; Thu, 13 Sep 2012 10:21:30 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757314Ab2IMKVX (ORCPT ); Thu, 13 Sep 2012 06:21:23 -0400 Received: from service87.mimecast.com ([91.220.42.44]:47873 "EHLO service87.mimecast.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756611Ab2IMKVK (ORCPT ); Thu, 13 Sep 2012 06:21:10 -0400 Received: from cam-owa1.Emea.Arm.com (fw-tnat.cambridge.arm.com [217.140.96.21]) by service87.mimecast.com; Thu, 13 Sep 2012 11:21:09 +0100 Received: from e102568-lin.cambridge.arm.com ([10.1.255.212]) by cam-owa1.Emea.Arm.com with Microsoft SMTPSVC(6.0.3790.0); Thu, 13 Sep 2012 11:21:06 +0100 From: Lorenzo Pieralisi To: linux-arm-kernel@lists.infradead.org Cc: linux-omap@vger.kernel.org, Lorenzo Pieralisi , Catalin Marinas , Will Deacon , Russell King , Nicolas Pitre , Colin Cross , Santosh Shilimkar , Daniel Lezcano , Amit Kucheria , Dave Martin , Wenzeng Chen Subject: [RFC PATCH 4/6] ARM: kernel: update cpu_suspend code to use cache LoUIS operations Date: Thu, 13 Sep 2012 11:20:49 +0100 Message-Id: <1347531651-28218-5-git-send-email-lorenzo.pieralisi@arm.com> X-Mailer: git-send-email 1.7.12 In-Reply-To: <1347531651-28218-1-git-send-email-lorenzo.pieralisi@arm.com> References: <1347531651-28218-1-git-send-email-lorenzo.pieralisi@arm.com> X-OriginalArrivalTime: 13 Sep 2012 10:21:06.0487 (UTC) FILETIME=[7C4A2470:01CD9199] X-MC-Unique: 112091311210903801 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org In processors like A15/A7 L2 cache is unified and integrated within the processor cache hierarchy, so that it is not considered an outer cache anymore. For processors like A15/A7 flush_cache_all() ends up cleaning all cache levels up to Level of Coherency (LoC) that includes the L2 unified cache. When a single CPU is suspended (CPU idle) a complete L2 clean is not required, so generic cpu_suspend code must clean the data cache using the newly introduced cache LoUIS function. The context and stack pointer (context pointer) are cleaned to main memory using cache area functions that operate on MVA and guarantee that the data is written back to main memory (perform cache cleaning up to the Point of Coherency - PoC) so that the processor can fetch the context when the MMU is off in the cpu_resume code path. outer_cache management remains unchanged. Reviewed-by: Santosh Shilimkar Signed-off-by: Lorenzo Pieralisi --- arch/arm/kernel/suspend.c | 17 ++++++++++++++++- 1 file changed, 16 insertions(+), 1 deletion(-) diff --git a/arch/arm/kernel/suspend.c b/arch/arm/kernel/suspend.c index 1794cc3..358bca3 100644 --- a/arch/arm/kernel/suspend.c +++ b/arch/arm/kernel/suspend.c @@ -17,6 +17,8 @@ extern void cpu_resume_mmu(void); */ void __cpu_suspend_save(u32 *ptr, u32 ptrsz, u32 sp, u32 *save_ptr) { + u32 *ctx = ptr; + *save_ptr = virt_to_phys(ptr); /* This must correspond to the LDM in cpu_resume() assembly */ @@ -26,7 +28,20 @@ void __cpu_suspend_save(u32 *ptr, u32 ptrsz, u32 sp, u32 *save_ptr) cpu_do_suspend(ptr); - flush_cache_all(); + flush_cache_louis(); + + /* + * flush_cache_louis does not guarantee that + * save_ptr and ptr are cleaned to main memory, + * just up to the Level of Unification Inner Shareable. + * Since the context pointer and context itself + * are to be retrieved with the MMU off that + * data must be cleaned from all cache levels + * to main memory using "area" cache primitives. + */ + __cpuc_flush_dcache_area(ctx, ptrsz); + __cpuc_flush_dcache_area(save_ptr, sizeof(*save_ptr)); + outer_clean_range(*save_ptr, *save_ptr + ptrsz); outer_clean_range(virt_to_phys(save_ptr), virt_to_phys(save_ptr) + sizeof(*save_ptr));