diff mbox

[RESEND,3/5] ARM: OMAP2+: AM33XX: Add clock entries to omap_clk data

Message ID 1348089570-16161-4-git-send-email-anilkumar@ti.com (mailing list archive)
State New, archived
Headers show

Commit Message

AnilKumar, Chimata Sept. 19, 2012, 9:19 p.m. UTC
Add AM335x cpu0 clock entry to the corresponding clock data
file. This is useful in getting the correct mpu clock pointer
to change the cpu frequency in cpufreq driver.

Signed-off-by: AnilKumar Ch <anilkumar@ti.com>
---
 arch/arm/mach-omap2/clock33xx_data.c |    1 +
 1 file changed, 1 insertion(+)

Comments

Paul Walmsley Sept. 19, 2012, 9:24 p.m. UTC | #1
Hi

On Thu, 20 Sep 2012, AnilKumar Ch wrote:

> Add AM335x cpu0 clock entry to the corresponding clock data
> file. This is useful in getting the correct mpu clock pointer
> to change the cpu frequency in cpufreq driver.
> 
> Signed-off-by: AnilKumar Ch <anilkumar@ti.com>

Looks like this one is unrelated to the DTS changes, so I'll queue it 
separately here for 3.7.

- Paul
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AnilKumar, Chimata Sept. 19, 2012, 9:27 p.m. UTC | #2
On Thu, Sep 20, 2012 at 02:54:31, Paul Walmsley wrote:
> Hi
> 
> On Thu, 20 Sep 2012, AnilKumar Ch wrote:
> 
> > Add AM335x cpu0 clock entry to the corresponding clock data
> > file. This is useful in getting the correct mpu clock pointer
> > to change the cpu frequency in cpufreq driver.
> > 
> > Signed-off-by: AnilKumar Ch <anilkumar@ti.com>
> 
> Looks like this one is unrelated to the DTS changes, so I'll queue it 
> separately here for 3.7.
> 

Thanks Paul

Thanks
AnilKumar
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diff mbox

Patch

diff --git a/arch/arm/mach-omap2/clock33xx_data.c b/arch/arm/mach-omap2/clock33xx_data.c
index a4006b2..4933993 100644
--- a/arch/arm/mach-omap2/clock33xx_data.c
+++ b/arch/arm/mach-omap2/clock33xx_data.c
@@ -1013,6 +1013,7 @@  static struct omap_clk am33xx_clks[] = {
 	CLK(NULL,	"dpll_core_m5_ck",	&dpll_core_m5_ck,	CK_AM33XX),
 	CLK(NULL,	"dpll_core_m6_ck",	&dpll_core_m6_ck,	CK_AM33XX),
 	CLK(NULL,	"dpll_mpu_ck",		&dpll_mpu_ck,	CK_AM33XX),
+	CLK("cpu0",	NULL,			&dpll_mpu_ck,		CK_AM33XX),
 	CLK(NULL,	"dpll_mpu_m2_ck",	&dpll_mpu_m2_ck,	CK_AM33XX),
 	CLK(NULL,	"dpll_ddr_ck",		&dpll_ddr_ck,	CK_AM33XX),
 	CLK(NULL,	"dpll_ddr_m2_ck",	&dpll_ddr_m2_ck,	CK_AM33XX),