From patchwork Tue Oct 23 08:37:11 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sebastien Guiriec X-Patchwork-Id: 1629391 Return-Path: X-Original-To: patchwork-linux-omap@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by patchwork2.kernel.org (Postfix) with ESMTP id 905F1DF283 for ; Tue, 23 Oct 2012 08:38:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756743Ab2JWIid (ORCPT ); Tue, 23 Oct 2012 04:38:33 -0400 Received: from bear.ext.ti.com ([192.94.94.41]:34023 "EHLO bear.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756880Ab2JWIh0 (ORCPT ); Tue, 23 Oct 2012 04:37:26 -0400 Received: from dlelxv30.itg.ti.com ([172.17.2.17]) by bear.ext.ti.com (8.13.7/8.13.7) with ESMTP id q9N8bL38012972; Tue, 23 Oct 2012 03:37:21 -0500 Received: from DFLE72.ent.ti.com (dfle72.ent.ti.com [128.247.5.109]) by dlelxv30.itg.ti.com (8.13.8/8.13.8) with ESMTP id q9N8bLrm007127; Tue, 23 Oct 2012 03:37:21 -0500 Received: from dlelxv22.itg.ti.com (172.17.1.197) by dfle72.ent.ti.com (128.247.5.109) with Microsoft SMTP Server id 14.1.323.3; Tue, 23 Oct 2012 03:37:20 -0500 Received: from unb0919150.emea.dhcp.ti.com (unb0919150.emea.dhcp.ti.com [137.167.111.10]) by dlelxv22.itg.ti.com (8.13.8/8.13.8) with ESMTP id q9N8bE5c025799; Tue, 23 Oct 2012 03:37:19 -0500 From: Sebastien Guiriec To: Sebastien Guiriec , Tony Lindgren , Benoit Cousson CC: , , , , Santosh Shilimkar Subject: [PATCH v2 3/4] ARM: dts: omap5: Update UART with address space and interrupts Date: Tue, 23 Oct 2012 10:37:11 +0200 Message-ID: <1350981432-6750-4-git-send-email-s-guiriec@ti.com> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1350981432-6750-1-git-send-email-s-guiriec@ti.com> References: <1350981432-6750-1-git-send-email-s-guiriec@ti.com> MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org Add base address and interrupt line inside Device Tree data for OMAP5. Signed-off-by: Sebastien Guiriec Reviewed-by: Shubhrajyoti D --- arch/arm/boot/dts/omap5.dtsi | 16 ++++++++++++++-- 1 file changed, 14 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi index 6c22e1b..413df94 100644 --- a/arch/arm/boot/dts/omap5.dtsi +++ b/arch/arm/boot/dts/omap5.dtsi @@ -237,36 +237,48 @@ uart1: serial@4806a000 { compatible = "ti,omap4-uart"; + reg = <0x4806a000 0x100>; + interrupts = <0 72 0x4>; ti,hwmods = "uart1"; clock-frequency = <48000000>; }; uart2: serial@4806c000 { compatible = "ti,omap4-uart"; + reg = <0x4806c000 0x100>; + interrupts = <0 73 0x4>; ti,hwmods = "uart2"; clock-frequency = <48000000>; }; uart3: serial@48020000 { compatible = "ti,omap4-uart"; + reg = <0x48020000 0x100>; + interrupts = <0 74 0x4>; ti,hwmods = "uart3"; clock-frequency = <48000000>; }; uart4: serial@4806e000 { compatible = "ti,omap4-uart"; + reg = <0x4806e000 0x100>; + interrupts = <0 70 0x4>; ti,hwmods = "uart4"; clock-frequency = <48000000>; }; uart5: serial@48066000 { - compatible = "ti,omap5-uart"; + compatible = "ti,omap4-uart"; + reg = <0x48066000 0x100>; + interrupts = <0 105 0x4>; ti,hwmods = "uart5"; clock-frequency = <48000000>; }; uart6: serial@48068000 { - compatible = "ti,omap6-uart"; + compatible = "ti,omap4-uart"; + reg = <0x48068000 0x100>; + interrupts = <0 106 0x4>; ti,hwmods = "uart6"; clock-frequency = <48000000>; };