From patchwork Thu Oct 25 14:39:49 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shubhrajyoti Datta X-Patchwork-Id: 1644651 Return-Path: X-Original-To: patchwork-linux-omap@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by patchwork2.kernel.org (Postfix) with ESMTP id EF0C3DFE76 for ; Thu, 25 Oct 2012 14:40:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1946075Ab2JYOkY (ORCPT ); Thu, 25 Oct 2012 10:40:24 -0400 Received: from arroyo.ext.ti.com ([192.94.94.40]:51922 "EHLO arroyo.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1945971Ab2JYOkW (ORCPT ); Thu, 25 Oct 2012 10:40:22 -0400 Received: from dbdp20.itg.ti.com ([172.24.170.38]) by arroyo.ext.ti.com (8.13.7/8.13.7) with ESMTP id q9PEdx1F007662; Thu, 25 Oct 2012 09:40:00 -0500 Received: from DBDE71.ent.ti.com (localhost [127.0.0.1]) by dbdp20.itg.ti.com (8.13.8/8.13.8) with ESMTP id q9PEduxb004892; Thu, 25 Oct 2012 20:09:57 +0530 (IST) Received: from dbdp33.itg.ti.com (172.24.170.252) by DBDE71.ent.ti.com (172.24.170.149) with Microsoft SMTP Server id 14.1.323.3; Thu, 25 Oct 2012 20:09:56 +0530 Received: from ula0393217.india.ti.com (smtpvbd.itg.ti.com [172.24.170.250]) by dbdp33.itg.ti.com (8.13.8/8.13.8) with ESMTP id q9PEdp5b030929; Thu, 25 Oct 2012 20:09:56 +0530 From: Shubhrajyoti D To: CC: , , , , , Shubhrajyoti D Subject: [PATCHv4 2/2] i2c: omap: make reset a seperate function Date: Thu, 25 Oct 2012 20:09:49 +0530 Message-ID: <1351175989-6401-3-git-send-email-shubhrajyoti@ti.com> X-Mailer: git-send-email 1.7.5.4 In-Reply-To: <1351175989-6401-1-git-send-email-shubhrajyoti@ti.com> References: <1351175989-6401-1-git-send-email-shubhrajyoti@ti.com> MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org Implement reset as a separate function. This will enable us to make sure that we don't do the calculation again on every transfer. Also at probe the reset is not added as the hwmod is doing that for us. Signed-off-by: Shubhrajyoti D --- some of the errors may not need a reset. will check and post separate patch. drivers/i2c/busses/i2c-omap.c | 25 ++++++++++++++++--------- 1 files changed, 16 insertions(+), 9 deletions(-) diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c index 38acf1a..a25b7b0 100644 --- a/drivers/i2c/busses/i2c-omap.c +++ b/drivers/i2c/busses/i2c-omap.c @@ -309,15 +309,9 @@ static void __omap_i2c_init(struct omap_i2c_dev *dev) omap_i2c_write_reg(dev, OMAP_I2C_IE_REG, dev->iestate); } -static int omap_i2c_init(struct omap_i2c_dev *dev) +static int omap_i2c_reset(struct omap_i2c_dev *dev) { - u16 psc = 0, scll = 0, sclh = 0; - u16 fsscll = 0, fssclh = 0, hsscll = 0, hssclh = 0; - unsigned long fclk_rate = 12000000; unsigned long timeout; - unsigned long internal_clk = 0; - struct clk *fclk; - if (dev->rev >= OMAP_I2C_OMAP1_REV_2) { /* Disable I2C controller before soft reset */ omap_i2c_write_reg(dev, OMAP_I2C_CON_REG, @@ -363,6 +357,17 @@ static int omap_i2c_init(struct omap_i2c_dev *dev) dev->westate = OMAP_I2C_WE_ALL; } } + return 0; +} + +static int omap_i2c_init(struct omap_i2c_dev *dev) +{ + u16 psc = 0, scll = 0, sclh = 0; + u16 fsscll = 0, fssclh = 0, hsscll = 0, hssclh = 0; + unsigned long fclk_rate = 12000000; + unsigned long internal_clk = 0; + struct clk *fclk; + if (dev->flags & OMAP_I2C_FLAG_ALWAYS_ARMXOR_CLK) { /* @@ -595,7 +600,8 @@ static int omap_i2c_xfer_msg(struct i2c_adapter *adap, if (timeout == 0) { dev_err(dev->dev, "controller timed out\n"); ret = -ETIMEDOUT; - omap_i2c_init(dev); + omap_i2c_reset(dev); + __omap_i2c_init(dev); goto out; } @@ -606,7 +612,8 @@ static int omap_i2c_xfer_msg(struct i2c_adapter *adap, if (dev->cmd_err & (OMAP_I2C_STAT_AL | OMAP_I2C_STAT_ROVR | OMAP_I2C_STAT_XUDF)) { ret = -EIO; - omap_i2c_init(dev); + omap_i2c_reset(dev); + __omap_i2c_init(dev); goto out; }