From patchwork Fri Nov 9 14:30:35 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tero Kristo X-Patchwork-Id: 1720861 Return-Path: X-Original-To: patchwork-linux-omap@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by patchwork1.kernel.org (Postfix) with ESMTP id 76E9C3FCDF for ; Fri, 9 Nov 2012 14:30:43 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753530Ab2KIOam (ORCPT ); Fri, 9 Nov 2012 09:30:42 -0500 Received: from bear.ext.ti.com ([192.94.94.41]:59840 "EHLO bear.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752877Ab2KIOal (ORCPT ); Fri, 9 Nov 2012 09:30:41 -0500 Received: from dlelxv30.itg.ti.com ([172.17.2.17]) by bear.ext.ti.com (8.13.7/8.13.7) with ESMTP id qA9EUclo000701; Fri, 9 Nov 2012 08:30:38 -0600 Received: from DFLE73.ent.ti.com (dfle73.ent.ti.com [128.247.5.110]) by dlelxv30.itg.ti.com (8.13.8/8.13.8) with ESMTP id qA9EUcoo022864; Fri, 9 Nov 2012 08:30:38 -0600 Received: from dlelxv22.itg.ti.com (172.17.1.197) by dfle73.ent.ti.com (128.247.5.110) with Microsoft SMTP Server id 14.1.323.3; Fri, 9 Nov 2012 08:30:38 -0600 Received: from localhost.localdomain (h78-6.vpn.ti.com [172.24.78.6]) by dlelxv22.itg.ti.com (8.13.8/8.13.8) with ESMTP id qA9EUZYH001951; Fri, 9 Nov 2012 08:30:36 -0600 From: Tero Kristo To: CC: , Kishon Vijay Abraham I , Felipe Balbi , Tony Lindgren , Kevin Hilman Subject: [PATCHv2] ARM: OMAP4: USB: power down MUSB PHY during boot Date: Fri, 9 Nov 2012 16:30:35 +0200 Message-ID: <1352471435-9560-1-git-send-email-t-kristo@ti.com> X-Mailer: git-send-email 1.7.4.1 MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org Commit c9e4412ab8eb8ef82d645d8749c4ce96ad490007 removed all of the USB PHY functions for OMAP4, but this causes a problem with core retention as the MUSB module remains enabled if omap-usb2 phy driver is not used. This keeps the USB DPLL enabled and prevents l3_init pwrdm from idling. Fixed by adding a minimal function back that disables the USB PHY during boot. Signed-off-by: Tero Kristo Cc: Kishon Vijay Abraham I Cc: Felipe Balbi Cc: Tony Lindgren Cc: Kevin Hilman Acked-by: Felipe Balbi --- arch/arm/mach-omap2/omap_phy_internal.c | 32 +++++++++++++++++++++++++++++++ 1 files changed, 32 insertions(+), 0 deletions(-) diff --git a/arch/arm/mach-omap2/omap_phy_internal.c b/arch/arm/mach-omap2/omap_phy_internal.c index d992db8..9b56e5e 100644 --- a/arch/arm/mach-omap2/omap_phy_internal.c +++ b/arch/arm/mach-omap2/omap_phy_internal.c @@ -33,6 +33,38 @@ #include "soc.h" #include "control.h" +#define CONTROL_DEV_CONF 0x300 +#define PHY_PD 0x1 + +/** + * omap4430_phy_power_down: disable MUSB PHY during early init + * + * OMAP4 MUSB PHY module is enabled by default on reset, but this will + * prevent core retention if not disabled by SW. USB driver will + * later on enable this, once and if the driver needs it. + */ +static int __init omap4430_phy_power_down(void) +{ + void __iomem *ctrl_base; + + if (!cpu_is_omap44xx()) + return 0; + + ctrl_base = ioremap(OMAP443X_SCM_BASE, SZ_1K); + if (!ctrl_base) { + pr_err("control module ioremap failed\n"); + return -ENOMEM; + } + + /* Power down the phy */ + __raw_writel(PHY_PD, ctrl_base + CONTROL_DEV_CONF); + + iounmap(ctrl_base); + + return 0; +} +early_initcall(omap4430_phy_power_down); + void am35x_musb_reset(void) { u32 regval;