From patchwork Tue Jan 29 11:15:07 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vaibhav Bedia X-Patchwork-Id: 2061031 Return-Path: X-Original-To: patchwork-linux-omap@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by patchwork1.kernel.org (Postfix) with ESMTP id 5BD1B3FCD5 for ; Tue, 29 Jan 2013 11:15:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755406Ab3A2LPq (ORCPT ); Tue, 29 Jan 2013 06:15:46 -0500 Received: from comal.ext.ti.com ([198.47.26.152]:34403 "EHLO comal.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754912Ab3A2LPq (ORCPT ); Tue, 29 Jan 2013 06:15:46 -0500 Received: from dbdp20.itg.ti.com ([172.24.170.38]) by comal.ext.ti.com (8.13.7/8.13.7) with ESMTP id r0TBFZ2j009459; Tue, 29 Jan 2013 05:15:36 -0600 Received: from DBDE70.ent.ti.com (localhost [127.0.0.1]) by dbdp20.itg.ti.com (8.13.8/8.13.8) with ESMTP id r0TBFVUm020612; Tue, 29 Jan 2013 16:45:35 +0530 (IST) Received: from dbdp32.itg.ti.com (172.24.170.251) by dbde70.ent.ti.com (172.24.170.148) with Microsoft SMTP Server id 14.1.323.3; Tue, 29 Jan 2013 16:45:32 +0530 Received: from psplinux063.india.ti.com (dbdp20.itg.ti.com [172.24.170.38]) by dbdp32.itg.ti.com (8.13.8/8.13.8) with ESMTP id r0TBFPJU026040; Tue, 29 Jan 2013 16:45:32 +0530 From: Vaibhav Bedia To: , , CC: , , , , Vaibhav Bedia Subject: [PATCH v3 8/9] ARM: DTS: AM33XX: Add nodes for OCMC RAM and WKUP-M3 Date: Tue, 29 Jan 2013 16:45:07 +0530 Message-ID: <1359458108-8489-9-git-send-email-vaibhav.bedia@ti.com> X-Mailer: git-send-email 1.8.1 In-Reply-To: <1359458108-8489-1-git-send-email-vaibhav.bedia@ti.com> References: <1359458108-8489-1-git-send-email-vaibhav.bedia@ti.com> MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org Since AM33XX supports only DT-boot, this is needed for the appropriate device nodes to be created. Note: OCMC RAM is part of the PER power domain and supports retention. The assembly code for low power entry/exit will run from OCMC RAM. To ensure that the OMAP PM code does not attempt to disable the clock to OCMC RAM as part of the suspend process add the no_idle_on_suspend flag. Signed-off-by: Vaibhav Bedia Acked-by: Santosh Shilimkar Acked-by: Peter Korsgaard --- v3: Update the compatible field as mentioned by Peter and his Acked-by v2: Add reg property arch/arm/boot/dts/am33xx.dtsi | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi index c2f14e8..0957645 100644 --- a/arch/arm/boot/dts/am33xx.dtsi +++ b/arch/arm/boot/dts/am33xx.dtsi @@ -385,5 +385,19 @@ mac-address = [ 00 00 00 00 00 00 ]; }; }; + + ocmcram: ocmcram@40300000 { + compatible = "ti,am3352-ocmcram"; + reg = <0x40300000 0x10000>; + ti,hwmods = "ocmcram"; + ti,no_idle_on_suspend; + }; + + wkup_m3: wkup_m3@44d00000 { + compatible = "ti,am3353-wkup-m3"; + reg = <0x44d00000 0x4000 /* M3 UMEM */ + 0x44d80000 0x2000>; /* M3 DMEM */ + ti,hwmods = "wkup_m3"; + }; }; };