From patchwork Wed Feb 20 15:27:11 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Santosh Shilimkar X-Patchwork-Id: 2167951 Return-Path: X-Original-To: patchwork-linux-omap@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by patchwork2.kernel.org (Postfix) with ESMTP id B3988DF230 for ; Wed, 20 Feb 2013 15:26:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S935325Ab3BTP0B (ORCPT ); Wed, 20 Feb 2013 10:26:01 -0500 Received: from comal.ext.ti.com ([198.47.26.152]:58206 "EHLO comal.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S935413Ab3BTP0A (ORCPT ); Wed, 20 Feb 2013 10:26:00 -0500 Received: from dbdp20.itg.ti.com ([172.24.170.38]) by comal.ext.ti.com (8.13.7/8.13.7) with ESMTP id r1KFPtKc007456; Wed, 20 Feb 2013 09:25:55 -0600 Received: from DBDE71.ent.ti.com (localhost [127.0.0.1]) by dbdp20.itg.ti.com (8.13.8/8.13.8) with ESMTP id r1KFPs5O012683; Wed, 20 Feb 2013 20:55:54 +0530 (IST) Received: from dbdp33.itg.ti.com (172.24.170.252) by DBDE71.ent.ti.com (172.24.170.149) with Microsoft SMTP Server id 14.1.323.3; Wed, 20 Feb 2013 20:55:54 +0530 Received: from ula0393909.apr.dhcp.ti.com (smtpvbd.itg.ti.com [172.24.170.250]) by dbdp33.itg.ti.com (8.13.8/8.13.8) with ESMTP id r1KFPluB023246; Wed, 20 Feb 2013 20:55:54 +0530 From: Santosh Shilimkar To: CC: , , Santosh Shilimkar Subject: [PATCH 5/8] ARM: OMAP5: Update SAR RAM base address Date: Wed, 20 Feb 2013 20:57:11 +0530 Message-ID: <1361374034-21831-6-git-send-email-santosh.shilimkar@ti.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1361374034-21831-1-git-send-email-santosh.shilimkar@ti.com> References: <1361374034-21831-1-git-send-email-santosh.shilimkar@ti.com> MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org Update SAR RAM base address for OMAP5 based devices. Signed-off-by: Santosh Shilimkar --- arch/arm/mach-omap2/omap4-common.c | 10 ++++++++-- arch/arm/mach-omap2/omap54xx.h | 1 + 2 files changed, 9 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-omap2/omap4-common.c b/arch/arm/mach-omap2/omap4-common.c index 6897ae2..59399f8 100644 --- a/arch/arm/mach-omap2/omap4-common.c +++ b/arch/arm/mach-omap2/omap4-common.c @@ -239,15 +239,21 @@ void __iomem *omap4_get_sar_ram_base(void) */ static int __init omap4_sar_ram_init(void) { + unsigned long sar_base; + /* * To avoid code running on other OMAPs in * multi-omap builds */ - if (!cpu_is_omap44xx()) + if (cpu_is_omap44xx()) + sar_base = OMAP44XX_SAR_RAM_BASE; + else if (soc_is_omap54xx()) + sar_base = OMAP54XX_SAR_RAM_BASE; + else return -ENOMEM; /* Static mapping, never released */ - sar_ram_base = ioremap(OMAP44XX_SAR_RAM_BASE, SZ_16K); + sar_ram_base = ioremap(sar_base, SZ_16K); if (WARN_ON(!sar_ram_base)) return -ENOMEM; diff --git a/arch/arm/mach-omap2/omap54xx.h b/arch/arm/mach-omap2/omap54xx.h index a2582bb..a086ba1 100644 --- a/arch/arm/mach-omap2/omap54xx.h +++ b/arch/arm/mach-omap2/omap54xx.h @@ -28,5 +28,6 @@ #define OMAP54XX_PRCM_MPU_BASE 0x48243000 #define OMAP54XX_SCM_BASE 0x4a002000 #define OMAP54XX_CTRL_BASE 0x4a002800 +#define OMAP54XX_SAR_RAM_BASE 0x4ae26000 #endif /* __ASM_SOC_OMAP555554XX_H */