From patchwork Tue Mar 19 13:30:49 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Santosh Shilimkar X-Patchwork-Id: 2300671 Return-Path: X-Original-To: patchwork-linux-omap@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by patchwork2.kernel.org (Postfix) with ESMTP id 2AA23DFB79 for ; Tue, 19 Mar 2013 13:29:38 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755520Ab3CSN3h (ORCPT ); Tue, 19 Mar 2013 09:29:37 -0400 Received: from devils.ext.ti.com ([198.47.26.153]:50275 "EHLO devils.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754808Ab3CSN3g (ORCPT ); Tue, 19 Mar 2013 09:29:36 -0400 Received: from dbdp20.itg.ti.com ([172.24.170.38]) by devils.ext.ti.com (8.13.7/8.13.7) with ESMTP id r2JDTWGS027729; Tue, 19 Mar 2013 08:29:33 -0500 Received: from DBDE71.ent.ti.com (localhost [127.0.0.1]) by dbdp20.itg.ti.com (8.13.8/8.13.8) with ESMTP id r2JDTWHv016206; Tue, 19 Mar 2013 18:59:32 +0530 (IST) Received: from dbdp32.itg.ti.com (172.24.170.251) by DBDE71.ent.ti.com (172.24.170.149) with Microsoft SMTP Server id 14.1.323.3; Tue, 19 Mar 2013 18:59:32 +0530 Received: from ula0393909.apr.dhcp.ti.com (smtpvbd.itg.ti.com [172.24.170.250]) by dbdp32.itg.ti.com (8.13.8/8.13.8) with ESMTP id r2JDT5dG017298; Tue, 19 Mar 2013 18:59:31 +0530 From: Santosh Shilimkar To: CC: , , , Rajendra Nayak , Santosh Shilimkar Subject: [PATCH v2 03/11] ARM: dts: OMAP5: Specify nonsecure PPI IRQ for arch timer Date: Tue, 19 Mar 2013 19:00:49 +0530 Message-ID: <1363699857-5505-4-git-send-email-santosh.shilimkar@ti.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1363699857-5505-1-git-send-email-santosh.shilimkar@ti.com> References: <1363699857-5505-1-git-send-email-santosh.shilimkar@ti.com> MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org From: Rajendra Nayak Specify both secure as well as nonsecure PPI IRQ for arch timer. This fixes the following errors seen on DT OMAP5 boot.. [ 0.000000] arch_timer: No interrupt available, giving up Cc: Benoit Cousson Signed-off-by: Rajendra Nayak Signed-off-by: Santosh Shilimkar --- arch/arm/boot/dts/omap5.dtsi | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi index aefecf7..71be239 100644 --- a/arch/arm/boot/dts/omap5.dtsi +++ b/arch/arm/boot/dts/omap5.dtsi @@ -41,8 +41,9 @@ timer { compatible = "arm,armv7-timer"; - /* 14th PPI IRQ, active low level-sensitive */ - interrupts = <1 14 0x308>; + /* PPI secure/nonsecure IRQ, active low level-sensitive */ + interrupts = <1 13 0x308>, + <1 14 0x308>; clock-frequency = <6144000>; };