Message ID | 1364577017-22562-3-git-send-email-hvaibhav@ti.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
On Fri, 29 Mar 2013, Vaibhav Hiremath wrote: > WDT1 module can take one of the below clocks as input functional > clock - > - On-Chip 32K RC Osc [default/reset] > - 32K from PRCM > > The On-Chip 32K RC Osc clock is not an accurate clock-source as per > the design/spec, so as a result, for example, timer which supposed > to get expired @60Sec, but will expire somewhere ~@40Sec, which is > not expected by any use-case. > > The solution here is to switch the input clock-source to PRCM > generated 32K clock-source during boot-time itself. > > Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> > Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> > Cc: Benoit Cousson <benoit.cousson@linaro.org> > Cc: Paul Walmsley <paul@pwsan.com> Thanks, queued for 3.10. - Paul -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
diff --git a/arch/arm/mach-omap2/cclock33xx_data.c b/arch/arm/mach-omap2/cclock33xx_data.c index 8327721..11e07b1 100644 --- a/arch/arm/mach-omap2/cclock33xx_data.c +++ b/arch/arm/mach-omap2/cclock33xx_data.c @@ -978,6 +978,14 @@ int __init am33xx_clk_init(void) clk_set_parent(&timer3_fck, &sys_clkin_ck); clk_set_parent(&timer6_fck, &sys_clkin_ck); + /* + * The On-Chip 32K RC Osc clock is not an accurate clock-source as per + * the design/spec, so as a result, for example, timer which supposed + * to get expired @60Sec, but will expire somewhere ~@40Sec, which is + * not expected by any use-case, so change WDT1 clock source to PRCM + * 32KHz clock. + */ + clk_set_parent(&wdt1_fck, &clkdiv32k_ick); return 0; }
WDT1 module can take one of the below clocks as input functional clock - - On-Chip 32K RC Osc [default/reset] - 32K from PRCM The On-Chip 32K RC Osc clock is not an accurate clock-source as per the design/spec, so as a result, for example, timer which supposed to get expired @60Sec, but will expire somewhere ~@40Sec, which is not expected by any use-case. The solution here is to switch the input clock-source to PRCM generated 32K clock-source during boot-time itself. Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> Cc: Benoit Cousson <benoit.cousson@linaro.org> Cc: Paul Walmsley <paul@pwsan.com> --- arch/arm/mach-omap2/cclock33xx_data.c | 8 ++++++++ 1 files changed, 8 insertions(+), 0 deletions(-)