From patchwork Fri Apr 19 14:53:28 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christoph Fritz X-Patchwork-Id: 2465521 Return-Path: X-Original-To: patchwork-linux-omap@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by patchwork2.kernel.org (Postfix) with ESMTP id 74D35DF25A for ; Fri, 19 Apr 2013 14:53:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1030809Ab3DSOxe (ORCPT ); Fri, 19 Apr 2013 10:53:34 -0400 Received: from mail-bk0-f42.google.com ([209.85.214.42]:51779 "EHLO mail-bk0-f42.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1030770Ab3DSOxe (ORCPT ); Fri, 19 Apr 2013 10:53:34 -0400 Received: by mail-bk0-f42.google.com with SMTP id jc3so1765914bkc.15 for ; Fri, 19 Apr 2013 07:53:32 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=googlemail.com; s=20120113; h=x-received:subject:from:to:cc:in-reply-to:references:content-type :date:message-id:mime-version:x-mailer:content-transfer-encoding; bh=mXhNN0/6rBjTv/K4/YQEq/4qWeKwnFTNA+pVHYf9rho=; b=PbT6f8aXRxehYvqtIdwrDdsDNfEuGf6RGR09d3+WeZzhJqsYZqNNkf+IRDEcczc4iH qBXpVi27gDMYqNRuEdGZ7GRAa/qHaZq1vXtkur8JCBR4PjSLpQc135ICqN/bRIwAvLEJ X+HpekhQH0bp0XEyRtfZHYgDGO6bqidNoxCKg1QSSaxtEDK8zwWAkhR8j4l/QUSUeDJG sM8By29VKjtL34MaQU2H5rloag5CV98MMvVdPh3w2CWhgkF5GR10E5xRKsCBUa1Yvoea XYnyvtkUNYz4IAf53seK09uA7ARbAtOjnvS+/nJcQR4oFMD5RFKg9DejFs6tEWezYVv2 8HWw== X-Received: by 10.205.68.195 with SMTP id xz3mr5972502bkb.41.1366383212465; Fri, 19 Apr 2013 07:53:32 -0700 (PDT) Received: from [192.168.1.12] (p549E9EDB.dip0.t-ipconnect.de. [84.158.158.219]) by mx.google.com with ESMTPS id iy11sm4132766bkb.11.2013.04.19.07.53.30 (version=SSLv3 cipher=RC4-SHA bits=128/128); Fri, 19 Apr 2013 07:53:31 -0700 (PDT) Subject: Re: ARM: dts: omap3: NAND support - how? From: Christoph Fritz To: Jon Hunter Cc: Javier Martinez Canillas , Daniel Mack , linux-omap@vger.kernel.org In-Reply-To: <51714E0D.7020304@ti.com> References: <1366311829.4085.90.camel@mars> <51704C05.4030200@ti.com> <1366316595.4085.113.camel@mars> <5170738F.8050305@ti.com> <1366325282.4232.6.camel@lovely> <51708097.6070102@ti.com> <51708131.2040208@ti.com> <1366362081.3928.18.camel@mars> <1366372957.3928.104.camel@mars> <51714E0D.7020304@ti.com> Date: Fri, 19 Apr 2013 16:53:28 +0200 Message-ID: <1366383208.3928.144.camel@mars> Mime-Version: 1.0 X-Mailer: Evolution 2.30.3 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org On Fri, 2013-04-19 at 09:00 -0500, Jon Hunter wrote: > On 04/19/2013 07:02 AM, Christoph Fritz wrote: > > so I hacked the missing values to omap2_nand_gpmc_retime(): > > > > From 8868823925441a824fe0d3143614482f25fb379b Mon Sep 17 00:00:00 2001 > > From: Christoph Fritz > > Date: Fri, 19 Apr 2013 12:41:11 +0200 > > Subject: [PATCH] [RFC] ARM: OMAP2+: nand: add missing gpmc timing values > > > > This patch adds missing gpmc timing values to omap2_nand_gpmc_retime(). > > --- > > arch/arm/mach-omap2/gpmc-nand.c | 10 ++++++++++ > > 1 file changed, 10 insertions(+) > > > > diff --git a/arch/arm/mach-omap2/gpmc-nand.c b/arch/arm/mach-omap2/gpmc-nand.c > > index d9c2719..d8bb241 100644 > > --- a/arch/arm/mach-omap2/gpmc-nand.c > > +++ b/arch/arm/mach-omap2/gpmc-nand.c > > @@ -58,6 +58,9 @@ static int omap2_nand_gpmc_retime( > > /* Read */ > > t.adv_rd_off = gpmc_t->adv_rd_off; > > t.oe_on = t.adv_on; > > + if (cpu_is_omap34xx()) { > > + t.oe_on = gpmc_t->oe_on; > > + } > > How about just setting gpmc,adv-on-ns, then you don't need the above. > > > t.access = gpmc_t->access; > > t.oe_off = gpmc_t->oe_off; > > t.cs_rd_off = gpmc_t->cs_rd_off; > > @@ -69,11 +72,18 @@ static int omap2_nand_gpmc_retime( > > if (cpu_is_omap34xx()) { > > We should get rid of cpu_is_omap34xx() here as this is handled by > gpmc_cs_set_timings(). > > > t.wr_data_mux_bus = gpmc_t->wr_data_mux_bus; > > t.wr_access = gpmc_t->wr_access; > > + t.we_on = gpmc_t->we_on; > > How about just setting gpmc,adv-on-ns, then you don't need the above. > > > } > > t.we_off = gpmc_t->we_off; > > t.cs_wr_off = gpmc_t->cs_wr_off; > > t.wr_cycle = gpmc_t->wr_cycle; > > > > + if (cpu_is_omap34xx()) { > > + t.bool_timings = gpmc_t->bool_timings; > > + t.cycle2cycle_delay = gpmc_t->cycle2cycle_delay; > > + t.page_burst_access = gpmc_t->page_burst_access; > > + } > > The above timings are applicable to all gpmc versions and so you should > not need to make this dependent on cpu_is_omap34xx(). So would be > worthwhile spending a patch to add the above timings to this function. Before sending this patch, I'd like to get your opinion on this approach: From 015f1e8006f8f85818b6bbd5ba00dc6b4ae48b65 Mon Sep 17 00:00:00 2001 From: Christoph Fritz Date: Fri, 19 Apr 2013 12:41:11 +0200 Subject: [RFC][PATCH] ARM: OMAP2+: nand: reorganize gpmc timing values This patch removes omap2_nand_gpmc_retime() which was used to quirk some timing values before gpmc_cs_set_timings(). Due to recent changes, gpmc_cs_set_timings() has evolved so that there is no more need for omap2_nand_gpmc_retime(). Signed-off-by: Christoph Fritz --- arch/arm/mach-omap2/gpmc-nand.c | 40 +-------------------------------------- 1 file changed, 1 insertion(+), 39 deletions(-) diff --git a/arch/arm/mach-omap2/gpmc-nand.c b/arch/arm/mach-omap2/gpmc-nand.c index d9c2719..c8044b0 100644 --- a/arch/arm/mach-omap2/gpmc-nand.c +++ b/arch/arm/mach-omap2/gpmc-nand.c @@ -43,44 +43,6 @@ static struct platform_device gpmc_nand_device = { .resource = gpmc_nand_resource, }; -static int omap2_nand_gpmc_retime( - struct omap_nand_platform_data *gpmc_nand_data, - struct gpmc_timings *gpmc_t) -{ - struct gpmc_timings t; - int err; - - memset(&t, 0, sizeof(t)); - t.sync_clk = gpmc_t->sync_clk; - t.cs_on = gpmc_t->cs_on; - t.adv_on = gpmc_t->adv_on; - - /* Read */ - t.adv_rd_off = gpmc_t->adv_rd_off; - t.oe_on = t.adv_on; - t.access = gpmc_t->access; - t.oe_off = gpmc_t->oe_off; - t.cs_rd_off = gpmc_t->cs_rd_off; - t.rd_cycle = gpmc_t->rd_cycle; - - /* Write */ - t.adv_wr_off = gpmc_t->adv_wr_off; - t.we_on = t.oe_on; - if (cpu_is_omap34xx()) { - t.wr_data_mux_bus = gpmc_t->wr_data_mux_bus; - t.wr_access = gpmc_t->wr_access; - } - t.we_off = gpmc_t->we_off; - t.cs_wr_off = gpmc_t->cs_wr_off; - t.wr_cycle = gpmc_t->wr_cycle; - - err = gpmc_cs_set_timings(gpmc_nand_data->cs, &t); - if (err) - return err; - - return 0; -} - static bool gpmc_hwecc_bch_capable(enum omap_ecc ecc_opt) { /* support only OMAP3 class */ @@ -131,7 +93,7 @@ int gpmc_nand_init(struct omap_nand_platform_data *gpmc_nand_data, gpmc_get_client_irq(GPMC_IRQ_COUNT_EVENT); if (gpmc_t) { - err = omap2_nand_gpmc_retime(gpmc_nand_data, gpmc_t); + err = gpmc_cs_set_timings(gpmc_nand_data->cs, gpmc_t); if (err < 0) { dev_err(dev, "Unable to set gpmc timings: %d\n", err); return err;