From patchwork Wed May 1 19:02:27 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Russ Dill X-Patchwork-Id: 2508671 Return-Path: X-Original-To: patchwork-linux-omap@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by patchwork1.kernel.org (Postfix) with ESMTP id 2842C3FC5A for ; Wed, 1 May 2013 19:02:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756023Ab3EATCk (ORCPT ); Wed, 1 May 2013 15:02:40 -0400 Received: from mail-pb0-f44.google.com ([209.85.160.44]:53684 "EHLO mail-pb0-f44.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755978Ab3EATCj (ORCPT ); Wed, 1 May 2013 15:02:39 -0400 Received: by mail-pb0-f44.google.com with SMTP id wz17so869233pbc.3 for ; Wed, 01 May 2013 12:02:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=x-received:sender:from:to:cc:subject:date:message-id:x-mailer :in-reply-to:references; bh=XBp0ihxYkMiNH32SSBIV12yv9kMV9Fk+CdkJMhNn4QY=; b=hiJqLgfGRlzNKIxBQeRhU+QBvZwYDbj4RMaoW0f9dvNept0gML2KKFfW2EuFNgfcT6 e4KbH22YQ/yjNbZnXqYmqH0aR6/2mPvgNflyIcFWufhmbXJzDMzZ8f6IPnIc0gZ4ozrv Tb9gJKxcu9lDMl6hoByMo0ZHncz6hEIQqfwa50JzOsmAN9xIkxVbeSuYWM5gBzjA+MT2 8tCP3/G2KRL1WPCuAtvLoWD9V2rvbKjypBzwDPC2OBSCr1ND+e6jqunREDrv35yefUAn 3awru0fAXIAmZXdI0gd/uWlzIR2yvM3AJdPJbqZPxY2+WVftqEEkUOHE5bKlsLz20gAo NHLg== X-Received: by 10.68.103.36 with SMTP id ft4mr5532240pbb.2.1367434958569; Wed, 01 May 2013 12:02:38 -0700 (PDT) Received: from localhost (pool-173-60-222-174.lsanca.fios.verizon.net. [173.60.222.174]) by mx.google.com with ESMTPSA id be10sm3969703pbd.30.2013.05.01.12.02.37 for (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Wed, 01 May 2013 12:02:37 -0700 (PDT) From: Russ Dill To: linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: khilman@deeprootsystems.com, tony@atomide.com, Vaibhav Bedia , Santosh Shilimkar Subject: [RFC 2/2] ARM: dts: add AM33XX vdd core opp50 suspend for Beaglebone. Date: Wed, 1 May 2013 12:02:27 -0700 Message-Id: <1367434947-6442-3-git-send-email-Russ.Dill@ti.com> X-Mailer: git-send-email 1.8.1.2 In-Reply-To: <1367434947-6442-1-git-send-email-Russ.Dill@ti.com> References: <1367434947-6442-1-git-send-email-Russ.Dill@ti.com> Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org This adds a sleep and wake sequence to set the VDD core voltage to the OPP50 level, 0.950V. This saves power during suspend. The sequences are specific to the Beaglebone layout and PMIC, the TPS65217. The sequences are written out by the am33xx PM code. Signed-off-by: Russ Dill --- arch/arm/boot/dts/am335x-bone.dts | 25 ++++++++++++++++++++++++- 1 file changed, 24 insertions(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/am335x-bone.dts b/arch/arm/boot/dts/am335x-bone.dts index 725aa63..bccada7 100644 --- a/arch/arm/boot/dts/am335x-bone.dts +++ b/arch/arm/boot/dts/am335x-bone.dts @@ -73,10 +73,33 @@ status = "okay"; clock-frequency = <400000>; + /* Set OPP50 (0.95V) for VDD core */ + sleep_sequence = /bits/ 8 < + 0x02 0x24 0x0b 0x6d /* Password unlock 1 */ + 0x02 0x24 0x10 0x02 /* Set DCDC3 to 0.95V */ + 0x02 0x24 0x0b 0x6d /* Password unlock 2 */ + 0x02 0x24 0x10 0x02 /* Set DCDC3 to 0.95V */ + 0x02 0x24 0x0b 0x6c /* Password unlock 1 */ + 0x02 0x24 0x11 0x86 /* Apply DCDC changes */ + 0x02 0x24 0x0b 0x6c /* Password unlock 2 */ + 0x02 0x24 0x11 0x86 /* Apply DCDC changes */ + >; + + /* Set OPP100 (1.10V) for VDD core */ + wake_sequence = /bits/ 8 < + 0x02 0x24 0x0b 0x6d /* Password unlock 1 */ + 0x02 0x24 0x10 0x08 /* Set DCDC3 to 1.1V */ + 0x02 0x24 0x0b 0x6d /* Password unlock 2 */ + 0x02 0x24 0x10 0x08 /* Set DCDC3 to 1.1V */ + 0x02 0x24 0x0b 0x6c /* Password unlock 1 */ + 0x02 0x24 0x11 0x86 /* Apply DCDC changes */ + 0x02 0x24 0x0b 0x6c /* Password unlock 2 */ + 0x02 0x24 0x11 0x86 /* Apply DCDC changes */ + >; + tps: tps@24 { reg = <0x24>; }; - }; rtc@44e3e000 {