From patchwork Mon Jun 3 13:19:54 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Afzal Mohammed X-Patchwork-Id: 2652371 Return-Path: X-Original-To: patchwork-linux-omap@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by patchwork1.kernel.org (Postfix) with ESMTP id 310C740077 for ; Mon, 3 Jun 2013 13:21:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757773Ab3FCNUs (ORCPT ); Mon, 3 Jun 2013 09:20:48 -0400 Received: from bear.ext.ti.com ([192.94.94.41]:44347 "EHLO bear.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756977Ab3FCNUf (ORCPT ); Mon, 3 Jun 2013 09:20:35 -0400 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by bear.ext.ti.com (8.13.7/8.13.7) with ESMTP id r53DJwMj004278; Mon, 3 Jun 2013 08:19:58 -0500 Received: from DLEE71.ent.ti.com (dlee71.ent.ti.com [157.170.170.114]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id r53DJwrc008357; Mon, 3 Jun 2013 08:19:58 -0500 Received: from dlelxv23.itg.ti.com (172.17.1.198) by DLEE71.ent.ti.com (157.170.170.114) with Microsoft SMTP Server id 14.2.342.3; Mon, 3 Jun 2013 08:19:58 -0500 Received: from psplinux063.india.ti.com (dbdp20.itg.ti.com [172.24.170.38]) by dlelxv23.itg.ti.com (8.13.8/8.13.8) with ESMTP id r53DJtIu010335; Mon, 3 Jun 2013 08:19:55 -0500 From: Afzal Mohammed To: , , , CC: Benoit Cousson , Tony Lindgren , Russell King , Ankur Kishore Subject: [PATCH v3] ARM: dts: AM43x: initial support Date: Mon, 3 Jun 2013 18:49:54 +0530 Message-ID: <1370265594-12883-1-git-send-email-afzal@ti.com> X-Mailer: git-send-email 1.7.12 MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org DT source (minimal) for AM4372 SoC to represent AM43x SoC's. Those represented here are the minimal DT nodes necessary to get kernel booting. In DT nodes, "ti,hwmod" property has not been added, this would be added along with PRCM support for AM43x. Signed-off-by: Ankur Kishore Signed-off-by: Afzal Mohammed --- v3: Make use of C preprocessor, rebased over Benoit's 'for_3.11/dts' branch v2: Add gptimer 1ms, timer2, synctimer and remove twd local timer arch/arm/boot/dts/am4372.dtsi | 68 +++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 68 insertions(+) create mode 100644 arch/arm/boot/dts/am4372.dtsi diff --git a/arch/arm/boot/dts/am4372.dtsi b/arch/arm/boot/dts/am4372.dtsi new file mode 100644 index 0000000..ddc1df7 --- /dev/null +++ b/arch/arm/boot/dts/am4372.dtsi @@ -0,0 +1,68 @@ +/* + * Device Tree Source for AM4372 SoC + * + * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/ + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +#include + +#include "skeleton.dtsi" + +/ { + compatible = "ti,am4372", "ti,am43"; + interrupt-parent = <&gic>; + + + aliases { + serial0 = &uart0; + }; + + cpus { + cpu@0 { + compatible = "arm,cortex-a9"; + }; + }; + + gic: interrupt-controller@48241000 { + compatible = "arm,cortex-a9-gic"; + interrupt-controller; + #interrupt-cells = <3>; + reg = <0x48241000 0x1000>, + <0x48240100 0x0100>; + }; + + ocp { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + uart0: serial@44e09000 { + compatible = "ti,am4372-uart","ti,omap2-uart"; + reg = <0x44e09000 0x2000>; + interrupts = ; + }; + + timer1: timer@44e31000 { + compatible = "ti,am4372-timer-1ms","ti,am335x-timer-1ms"; + reg = <0x44e31000 0x400>; + interrupts = ; + ti,timer-alwon; + }; + + timer2: timer@48040000 { + compatible = "ti,am4372-timer","ti,am335x-timer"; + reg = <0x48040000 0x400>; + interrupts = ; + }; + + counter32k: counter@44e86000 { + compatible = "ti,am4372-counter32k","ti,omap-counter32k"; + reg = <0x44e86000 0x40>; + }; + }; +};