From patchwork Mon Jun 17 13:16:22 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rajendra Nayak X-Patchwork-Id: 2733291 Return-Path: X-Original-To: patchwork-linux-omap@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 3D5159F39E for ; Mon, 17 Jun 2013 13:17:33 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 0B3542031A for ; Mon, 17 Jun 2013 13:17:32 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 53BDF2030E for ; Mon, 17 Jun 2013 13:17:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756284Ab3FQNRT (ORCPT ); Mon, 17 Jun 2013 09:17:19 -0400 Received: from bear.ext.ti.com ([192.94.94.41]:51446 "EHLO bear.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756286Ab3FQNRQ (ORCPT ); Mon, 17 Jun 2013 09:17:16 -0400 Received: from dbdlxv05.itg.ti.com ([172.24.171.60]) by bear.ext.ti.com (8.13.7/8.13.7) with ESMTP id r5HDGj95032395; Mon, 17 Jun 2013 08:16:46 -0500 Received: from DBDE72.ent.ti.com (dbde72.ent.ti.com [172.24.171.97]) by dbdlxv05.itg.ti.com (8.14.3/8.13.8) with ESMTP id r5HDGcmw016060; Mon, 17 Jun 2013 08:16:44 -0500 Received: from dbdp33.itg.ti.com (172.24.170.252) by DBDE72.ent.ti.com (172.24.171.97) with Microsoft SMTP Server id 14.2.342.3; Mon, 17 Jun 2013 21:16:38 +0800 Received: from ula0131687.itg.ti.com (smtpvbd.itg.ti.com [172.24.170.250]) by dbdp33.itg.ti.com (8.13.8/8.13.8) with ESMTP id r5HDGYt9023233; Mon, 17 Jun 2013 18:46:38 +0530 From: Rajendra Nayak To: , , CC: , , Rajendra Nayak Subject: [PATCH v2 1/2] ARM: OMAP2+: Powerdomain: Remove the need to always have a voltdm associated to a pwrdm Date: Mon, 17 Jun 2013 18:46:22 +0530 Message-ID: <1371474983-29296-2-git-send-email-rnayak@ti.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1371474983-29296-1-git-send-email-rnayak@ti.com> References: <1371474983-29296-1-git-send-email-rnayak@ti.com> MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Spam-Status: No, score=-8.0 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The powerdomain framework currently expects all powerdomains to be associated with a corresponding voltagedomain. For some SoCs' (like the already existing AM33xx family, or for the upcoming AM437x and DRA7 SoCs') which do not have a Voltage controller/Voltage Processor (neither the SR I2C bus to communicate with the PMIC) there is no need for a Powerdomain to have a voltage domain association since there is no auto-scaling of voltages possible using the voltage FSM. Extend the arch operations to add an api which the powerdomain core can then use to identify if a voltdm lookup and association for a powerdomain is really needed. Acked-by: Nishanth Menon Acked-by: Vaibhav Hiremath Signed-off-by: Rajendra Nayak --- arch/arm/mach-omap2/powerdomain.c | 5 +++++ arch/arm/mach-omap2/powerdomain.h | 2 ++ 2 files changed, 7 insertions(+) diff --git a/arch/arm/mach-omap2/powerdomain.c b/arch/arm/mach-omap2/powerdomain.c index 86babd7..e233dfc 100644 --- a/arch/arm/mach-omap2/powerdomain.c +++ b/arch/arm/mach-omap2/powerdomain.c @@ -102,6 +102,10 @@ static int _pwrdm_register(struct powerdomain *pwrdm) if (_pwrdm_lookup(pwrdm->name)) return -EEXIST; + if (arch_pwrdm && arch_pwrdm->pwrdm_has_voltdm) + if (!arch_pwrdm->pwrdm_has_voltdm()) + goto skip_voltdm; + voltdm = voltdm_lookup(pwrdm->voltdm.name); if (!voltdm) { pr_err("powerdomain: %s: voltagedomain %s does not exist\n", @@ -111,6 +115,7 @@ static int _pwrdm_register(struct powerdomain *pwrdm) pwrdm->voltdm.ptr = voltdm; INIT_LIST_HEAD(&pwrdm->voltdm_node); voltdm_add_pwrdm(voltdm, pwrdm); +skip_voltdm: spin_lock_init(&pwrdm->_lock); list_add(&pwrdm->node, &pwrdm_list); diff --git a/arch/arm/mach-omap2/powerdomain.h b/arch/arm/mach-omap2/powerdomain.h index 140c360..9701ad5 100644 --- a/arch/arm/mach-omap2/powerdomain.h +++ b/arch/arm/mach-omap2/powerdomain.h @@ -166,6 +166,7 @@ struct powerdomain { * @pwrdm_disable_hdwr_sar: Disable Hardware Save-Restore feature for a pd * @pwrdm_set_lowpwrstchange: Enable pd transitions from a shallow to deep sleep * @pwrdm_wait_transition: Wait for a pd state transition to complete + * @pwrdm_has_voltdm: Check if a voltdm association is needed * * Regarding @pwrdm_set_lowpwrstchange: On the OMAP2 and 3-family * chips, a powerdomain's power state is not allowed to directly @@ -196,6 +197,7 @@ struct pwrdm_ops { int (*pwrdm_disable_hdwr_sar)(struct powerdomain *pwrdm); int (*pwrdm_set_lowpwrstchange)(struct powerdomain *pwrdm); int (*pwrdm_wait_transition)(struct powerdomain *pwrdm); + int (*pwrdm_has_voltdm)(void); }; int pwrdm_register_platform_funcs(struct pwrdm_ops *custom_funcs);