From patchwork Fri Jun 21 15:46:10 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ruchika Kharwar X-Patchwork-Id: 2763401 Return-Path: X-Original-To: patchwork-linux-omap@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id DA1D2C0AB1 for ; Fri, 21 Jun 2013 15:46:19 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id CBB39201FA for ; Fri, 21 Jun 2013 15:46:18 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id A2322201F5 for ; Fri, 21 Jun 2013 15:46:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1161466Ab3FUPqQ (ORCPT ); Fri, 21 Jun 2013 11:46:16 -0400 Received: from arroyo.ext.ti.com ([192.94.94.40]:41067 "EHLO arroyo.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1161367Ab3FUPqP (ORCPT ); Fri, 21 Jun 2013 11:46:15 -0400 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by arroyo.ext.ti.com (8.13.7/8.13.7) with ESMTP id r5LFkDvp013259; Fri, 21 Jun 2013 10:46:13 -0500 Received: from DLEE70.ent.ti.com (dlee70.ent.ti.com [157.170.170.113]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id r5LFkCHs010925; Fri, 21 Jun 2013 10:46:12 -0500 Received: from dlelxv24.itg.ti.com (172.17.1.199) by DLEE70.ent.ti.com (157.170.170.113) with Microsoft SMTP Server id 14.2.342.3; Fri, 21 Jun 2013 10:46:13 -0500 Received: from legion.dal.design.ti.com (legion.dal.design.ti.com [128.247.22.53]) by dlelxv24.itg.ti.com (8.13.8/8.13.8) with ESMTP id r5LFkDu7017448; Fri, 21 Jun 2013 10:46:13 -0500 Received: from localhost (ula0875018.am.dhcp.ti.com [128.247.91.34]) by legion.dal.design.ti.com (8.11.7p1+Sun/8.11.7) with ESMTP id r5LFkDV12172; Fri, 21 Jun 2013 10:46:13 -0500 (CDT) From: Ruchika Kharwar To: , , CC: Felipe Balbi , Kishon Vijay Abraham I , Greg Kroah-Hartman , Rob Landley , Ruchika Kharwar , Nikhil Devshatwar Subject: [PATCH] jacinto6 : usb3_phy: Updated dpll M,N values. Date: Fri, 21 Jun 2013 10:46:10 -0500 Message-ID: <1371829570-15011-1-git-send-email-ruchika@ti.com> X-Mailer: git-send-email 1.7.9.5 MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Spam-Status: No, score=-8.4 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Addition of the M and N recommended values for the USB3 PHY DPLL. Sysclk for DRA7xx is 20MHz. This yields: Clk = 20MHz * M/(N+1) = 20MHz * 1000 /(7+1) = 2.5 Ghz Signed-off-by: Nikhil Devshatwar Signed-off-by: Ruchika Kharwar --- drivers/usb/phy/phy-omap-usb3.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/drivers/usb/phy/phy-omap-usb3.c b/drivers/usb/phy/phy-omap-usb3.c index a6e60b1..a2fb30b 100644 --- a/drivers/usb/phy/phy-omap-usb3.c +++ b/drivers/usb/phy/phy-omap-usb3.c @@ -27,7 +27,7 @@ #include #include -#define NUM_SYS_CLKS 5 +#define NUM_SYS_CLKS 6 #define PLL_STATUS 0x00000004 #define PLL_GO 0x00000008 #define PLL_CONFIGURATION1 0x0000000C @@ -62,6 +62,7 @@ enum sys_clk_rate { CLK_RATE_12MHZ, CLK_RATE_16MHZ, CLK_RATE_19MHZ, + CLK_RATE_20MHZ, CLK_RATE_26MHZ, CLK_RATE_38MHZ }; @@ -70,8 +71,10 @@ static struct usb_dpll_params omap_usb3_dpll_params[NUM_SYS_CLKS] = { {1250, 5, 4, 20, 0}, /* 12 MHz */ {3125, 20, 4, 20, 0}, /* 16.8 MHz */ {1172, 8, 4, 20, 65537}, /* 19.2 MHz */ + {1000, 7, 4, 10, 0}, /* 20 MHz */ {1250, 12, 4, 20, 0}, /* 26 MHz */ {3125, 47, 4, 20, 92843}, /* 38.4 MHz */ + }; static int omap_usb3_suspend(struct usb_phy *x, int suspend) @@ -122,6 +125,8 @@ static inline enum sys_clk_rate __get_sys_clk_index(unsigned long rate) return CLK_RATE_16MHZ; case 19200000: return CLK_RATE_19MHZ; + case 20000000: + return CLK_RATE_20MHZ; case 26000000: return CLK_RATE_26MHZ; case 38400000: