From patchwork Tue Jul 30 11:25:42 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rajendra Nayak X-Patchwork-Id: 2835551 Return-Path: X-Original-To: patchwork-linux-omap@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 8A4A99F9CE for ; Tue, 30 Jul 2013 11:27:00 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id C51832014A for ; Tue, 30 Jul 2013 11:26:55 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 3EB6820177 for ; Tue, 30 Jul 2013 11:26:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753662Ab3G3L0j (ORCPT ); Tue, 30 Jul 2013 07:26:39 -0400 Received: from comal.ext.ti.com ([198.47.26.152]:41739 "EHLO comal.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753626Ab3G3L0i (ORCPT ); Tue, 30 Jul 2013 07:26:38 -0400 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by comal.ext.ti.com (8.13.7/8.13.7) with ESMTP id r6UBQDmc026401; Tue, 30 Jul 2013 06:26:13 -0500 Received: from DLEE71.ent.ti.com (dlee71.ent.ti.com [157.170.170.114]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id r6UBQDY2019703; Tue, 30 Jul 2013 06:26:13 -0500 Received: from dlelxv22.itg.ti.com (172.17.1.197) by DLEE71.ent.ti.com (157.170.170.114) with Microsoft SMTP Server id 14.2.342.3; Tue, 30 Jul 2013 06:26:13 -0500 Received: from ula0131687.itg.ti.com (ula0131687-172024145021.apr.dhcp.ti.com [172.24.145.21]) by dlelxv22.itg.ti.com (8.13.8/8.13.8) with ESMTP id r6UBPuuR032529; Tue, 30 Jul 2013 06:26:10 -0500 From: Rajendra Nayak To: , CC: , , , , , , , Rajendra Nayak Subject: [PATCH v2 4/8] ARM: DRA7: Reuse io tables and add a new .init_early Date: Tue, 30 Jul 2013 16:55:42 +0530 Message-ID: <1375183546-12758-5-git-send-email-rnayak@ti.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1375183546-12758-1-git-send-email-rnayak@ti.com> References: <1375183546-12758-1-git-send-email-rnayak@ti.com> MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Spam-Status: No, score=-8.4 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: R Sricharan The IO descriptor tables for DRA7 are a complete reuse from OMAP5. A new dra7xx_init_early() does the base address inits. Signed-off-by: R Sricharan Signed-off-by: Rajendra Nayak --- arch/arm/mach-omap2/common.h | 1 + arch/arm/mach-omap2/io.c | 22 ++++++++++++++++++++-- arch/arm/mach-omap2/omap54xx.h | 4 ++++ 3 files changed, 25 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-omap2/common.h b/arch/arm/mach-omap2/common.h index dfcc182..4a5684b 100644 --- a/arch/arm/mach-omap2/common.h +++ b/arch/arm/mach-omap2/common.h @@ -110,6 +110,7 @@ void omap3630_init_late(void); void am35xx_init_late(void); void ti81xx_init_late(void); int omap2_common_pm_late_init(void); +void dra7xx_init_early(void); #ifdef CONFIG_SOC_BUS void omap_soc_device_init(void); diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c index 4a3f06f..44aa4f0 100644 --- a/arch/arm/mach-omap2/io.c +++ b/arch/arm/mach-omap2/io.c @@ -251,7 +251,7 @@ static struct map_desc omap44xx_io_desc[] __initdata = { }; #endif -#ifdef CONFIG_SOC_OMAP5 +#if defined(CONFIG_SOC_OMAP5) || defined(CONFIG_SOC_DRA7XX) static struct map_desc omap54xx_io_desc[] __initdata = { { .virtual = L3_54XX_VIRT, @@ -333,7 +333,7 @@ void __init omap4_map_io(void) } #endif -#ifdef CONFIG_SOC_OMAP5 +#if defined(CONFIG_SOC_OMAP5) || defined(CONFIG_SOC_DRA7XX) void __init omap5_map_io(void) { iotable_init(omap54xx_io_desc, ARRAY_SIZE(omap54xx_io_desc)); @@ -653,6 +653,24 @@ void __init omap5_init_early(void) } #endif +#ifdef CONFIG_SOC_DRA7XX +void __init dra7xx_init_early(void) +{ + omap2_set_globals_tap(DRA7XX_CLASS, + OMAP2_L4_IO_ADDRESS(DRA7XX_TAP_BASE)); + omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP54XX_SCM_BASE), + OMAP2_L4_IO_ADDRESS(DRA7XX_CTRL_BASE)); + omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP54XX_PRM_BASE)); + omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(DRA7XX_CM_CORE_AON_BASE), + OMAP2_L4_IO_ADDRESS(OMAP54XX_CM_CORE_BASE)); + omap2_set_globals_prcm_mpu(OMAP2_L4_IO_ADDRESS(OMAP54XX_PRCM_MPU_BASE)); + omap_prm_base_init(); + omap_cm_base_init(); + dra7xx_check_revision(); +} +#endif + + void __init omap_sdrc_init(struct omap_sdrc_params *sdrc_cs0, struct omap_sdrc_params *sdrc_cs1) { diff --git a/arch/arm/mach-omap2/omap54xx.h b/arch/arm/mach-omap2/omap54xx.h index a086ba1..2d35c57 100644 --- a/arch/arm/mach-omap2/omap54xx.h +++ b/arch/arm/mach-omap2/omap54xx.h @@ -30,4 +30,8 @@ #define OMAP54XX_CTRL_BASE 0x4a002800 #define OMAP54XX_SAR_RAM_BASE 0x4ae26000 +#define DRA7XX_CM_CORE_AON_BASE 0x4a005000 +#define DRA7XX_CTRL_BASE 0x4a003400 +#define DRA7XX_TAP_BASE 0x4ae0c000 + #endif /* __ASM_SOC_OMAP555554XX_H */