From patchwork Thu Aug 1 14:00:02 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Poddar, Sourav" X-Patchwork-Id: 2837042 Return-Path: X-Original-To: patchwork-linux-omap@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 135529F7D6 for ; Thu, 1 Aug 2013 14:00:55 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id E9D4620308 for ; Thu, 1 Aug 2013 14:00:53 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 3CC5520264 for ; Thu, 1 Aug 2013 14:00:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756036Ab3HAOAf (ORCPT ); Thu, 1 Aug 2013 10:00:35 -0400 Received: from comal.ext.ti.com ([198.47.26.152]:56685 "EHLO comal.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755979Ab3HAOAe (ORCPT ); Thu, 1 Aug 2013 10:00:34 -0400 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by comal.ext.ti.com (8.13.7/8.13.7) with ESMTP id r71E0M0M030399; Thu, 1 Aug 2013 09:00:22 -0500 Received: from DLEE71.ent.ti.com (dlee71.ent.ti.com [157.170.170.114]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id r71E0MJE010850; Thu, 1 Aug 2013 09:00:22 -0500 Received: from dlelxv22.itg.ti.com (172.17.1.197) by DLEE71.ent.ti.com (157.170.170.114) with Microsoft SMTP Server id 14.2.342.3; Thu, 1 Aug 2013 09:00:21 -0500 Received: from a0131647.apr.dhcp.ti.com (a0131647.apr.dhcp.ti.com [172.24.145.168]) by dlelxv22.itg.ti.com (8.13.8/8.13.8) with ESMTP id r71E04qu021276; Thu, 1 Aug 2013 09:00:19 -0500 From: Sourav Poddar To: , , CC: , , , , Sourav Poddar Subject: [RFC/PATCH 2/2] driver: spi: Add quad spi read support Date: Thu, 1 Aug 2013 19:30:02 +0530 Message-ID: <1375365602-31321-3-git-send-email-sourav.poddar@ti.com> X-Mailer: git-send-email 1.7.1 In-Reply-To: <1375365602-31321-1-git-send-email-sourav.poddar@ti.com> References: <1375365602-31321-1-git-send-email-sourav.poddar@ti.com> MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Spam-Status: No, score=-8.4 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Since, qspi controller uses quad read. Configuring the command register, if the transfer of data needs dual or quad lines. This patch has been done on top of the following patch[1], which is just the basic idea of adding dual/quad support in spi framework. $subject patch will undergo changes once the ongoing discussion in the community is freezed. This patch is posted to demonstrate how patch 1 of the series will support quad read. [1]: http://comments.gmane.org/gmane.linux.kernel.spi.devel/14047 Signed-off-by: Sourav Poddar --- drivers/spi/spi-ti-qspi.c | 22 ++++++++++++++++------ 1 files changed, 16 insertions(+), 6 deletions(-) diff --git a/drivers/spi/spi-ti-qspi.c b/drivers/spi/spi-ti-qspi.c index 73a1675..fac1722 100644 --- a/drivers/spi/spi-ti-qspi.c +++ b/drivers/spi/spi-ti-qspi.c @@ -265,18 +265,30 @@ static int qspi_write_msg(struct ti_qspi *qspi, struct spi_transfer *t) static int qspi_read_msg(struct ti_qspi *qspi, struct spi_transfer *t) { int wlen, count, ret; + unsigned cmd = qspi->cmd; count = t->len; wlen = t->bits_per_word; + switch (t->bitwidth) { + case SPI_BITWIDTH_QUAD: + cmd |= QSPI_RD_QUAD; + break; + case SPI_BITWIDTH_DUAL: + cmd |= QSPI_RD_DUAL; + break; + case SPI_BITWIDTH_SINGLE: + default: + cmd |= QSPI_RD_SNGL; + } + if (wlen == 8) { u8 *rxbuf; rxbuf = t->rx_buf; do { dev_dbg(qspi->dev, "rx cmd %08x dc %08x\n", qspi->cmd | QSPI_RD_SNGL, qspi->dc); - ti_qspi_write(qspi, qspi->cmd | QSPI_RD_SNGL, - QSPI_SPI_CMD_REG); + ti_qspi_write(qspi, cmd, QSPI_SPI_CMD_REG); ret = wait_for_completion_timeout(&qspi->transfer_complete, QSPI_COMPLETION_TIMEOUT); if (ret == 0) { @@ -294,8 +306,7 @@ static int qspi_read_msg(struct ti_qspi *qspi, struct spi_transfer *t) do { dev_dbg(qspi->dev, "rx cmd %08x dc %08x\n", qspi->cmd | QSPI_RD_SNGL, qspi->dc); - ti_qspi_write(qspi, qspi->cmd | QSPI_RD_SNGL, - QSPI_SPI_CMD_REG); + ti_qspi_write(qspi, cmd, QSPI_SPI_CMD_REG); ret = wait_for_completion_timeout(&qspi->transfer_complete, QSPI_COMPLETION_TIMEOUT); if (ret == 0) { @@ -313,8 +324,7 @@ static int qspi_read_msg(struct ti_qspi *qspi, struct spi_transfer *t) do { dev_dbg(qspi->dev, "rx cmd %08x dc %08x\n", qspi->cmd | QSPI_RD_SNGL, qspi->dc); - ti_qspi_write(qspi, qspi->cmd | QSPI_RD_SNGL, - QSPI_SPI_CMD_REG); + ti_qspi_write(qspi, cmd, QSPI_SPI_CMD_REG); ret = wait_for_completion_timeout(&qspi->transfer_complete, QSPI_COMPLETION_TIMEOUT); if (ret == 0) {