From patchwork Sun Aug 4 08:58:10 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Poddar, Sourav" X-Patchwork-Id: 2838344 Return-Path: X-Original-To: patchwork-linux-omap@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 42DF1BF535 for ; Sun, 4 Aug 2013 08:58:38 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 659322012F for ; Sun, 4 Aug 2013 08:58:37 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 01DED20165 for ; Sun, 4 Aug 2013 08:58:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752443Ab3HDI6f (ORCPT ); Sun, 4 Aug 2013 04:58:35 -0400 Received: from comal.ext.ti.com ([198.47.26.152]:55869 "EHLO comal.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752383Ab3HDI6e (ORCPT ); Sun, 4 Aug 2013 04:58:34 -0400 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by comal.ext.ti.com (8.13.7/8.13.7) with ESMTP id r748wNZC025646; Sun, 4 Aug 2013 03:58:23 -0500 Received: from DFLE73.ent.ti.com (dfle73.ent.ti.com [128.247.5.110]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id r748wN2f022222; Sun, 4 Aug 2013 03:58:23 -0500 Received: from dlelxv22.itg.ti.com (172.17.1.197) by DFLE73.ent.ti.com (128.247.5.110) with Microsoft SMTP Server id 14.2.342.3; Sun, 4 Aug 2013 03:58:22 -0500 Received: from a0131647.apr.dhcp.ti.com (a0131647.apr.dhcp.ti.com [172.24.145.168]) by dlelxv22.itg.ti.com (8.13.8/8.13.8) with ESMTP id r748wDOQ004074; Sun, 4 Aug 2013 03:58:20 -0500 From: Sourav Poddar To: , , CC: , , , Sourav Poddar Subject: [RFC/PATCH 2/2] driver: spi: Add quad spi read support Date: Sun, 4 Aug 2013 14:28:10 +0530 Message-ID: <1375606690-834-3-git-send-email-sourav.poddar@ti.com> X-Mailer: git-send-email 1.7.1 In-Reply-To: <1375606690-834-1-git-send-email-sourav.poddar@ti.com> References: <1375606690-834-1-git-send-email-sourav.poddar@ti.com> MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Since, qspi controller uses quad read. Configuring the command register, if the transfer of data needs dual or quad lines. This patch has been done on top of the following patch[1], which is just the basic idea of adding dual/quad support in spi framework. $subject patch will undergo changes once the ongoing discussion in the community is freezed. This patch is posted to demonstrate how patch 1 of the series will support quad read. [1]: http://comments.gmane.org/gmane.linux.kernel.spi.devel/14047 Signed-off-by: Sourav Poddar --- drivers/spi/spi-ti-qspi.c | 22 ++++++++++++++++------ 1 files changed, 16 insertions(+), 6 deletions(-) diff --git a/drivers/spi/spi-ti-qspi.c b/drivers/spi/spi-ti-qspi.c index 4328ae2..65457f5 100644 --- a/drivers/spi/spi-ti-qspi.c +++ b/drivers/spi/spi-ti-qspi.c @@ -266,18 +266,30 @@ static int qspi_write_msg(struct ti_qspi *qspi, struct spi_transfer *t) static int qspi_read_msg(struct ti_qspi *qspi, struct spi_transfer *t) { int wlen, count, ret; + unsigned cmd = qspi->cmd; count = t->len; wlen = t->bits_per_word; + switch (t->bitwidth) { + case SPI_BITWIDTH_QUAD: + cmd |= QSPI_RD_QUAD; + break; + case SPI_BITWIDTH_DUAL: + cmd |= QSPI_RD_DUAL; + break; + case SPI_BITWIDTH_SINGLE: + default: + cmd |= QSPI_RD_SNGL; + } + if (wlen == 8) { u8 *rxbuf; rxbuf = t->rx_buf; do { dev_dbg(qspi->dev, "rx cmd %08x dc %08x\n", qspi->cmd | QSPI_RD_SNGL, qspi->dc); - ti_qspi_write(qspi, qspi->cmd | QSPI_RD_SNGL, - QSPI_SPI_CMD_REG); + ti_qspi_write(qspi, cmd, QSPI_SPI_CMD_REG); ret = wait_for_completion_timeout(&qspi->transfer_complete, QSPI_COMPLETION_TIMEOUT); if (ret == 0) { @@ -295,8 +307,7 @@ static int qspi_read_msg(struct ti_qspi *qspi, struct spi_transfer *t) do { dev_dbg(qspi->dev, "rx cmd %08x dc %08x\n", qspi->cmd | QSPI_RD_SNGL, qspi->dc); - ti_qspi_write(qspi, qspi->cmd | QSPI_RD_SNGL, - QSPI_SPI_CMD_REG); + ti_qspi_write(qspi, cmd, QSPI_SPI_CMD_REG); ret = wait_for_completion_timeout(&qspi->transfer_complete, QSPI_COMPLETION_TIMEOUT); if (ret == 0) { @@ -314,8 +325,7 @@ static int qspi_read_msg(struct ti_qspi *qspi, struct spi_transfer *t) do { dev_dbg(qspi->dev, "rx cmd %08x dc %08x\n", qspi->cmd | QSPI_RD_SNGL, qspi->dc); - ti_qspi_write(qspi, qspi->cmd | QSPI_RD_SNGL, - QSPI_SPI_CMD_REG); + ti_qspi_write(qspi, cmd, QSPI_SPI_CMD_REG); ret = wait_for_completion_timeout(&qspi->transfer_complete, QSPI_COMPLETION_TIMEOUT); if (ret == 0) {