From patchwork Sun Aug 4 16:27:35 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rajendra Nayak X-Patchwork-Id: 2838432 Return-Path: X-Original-To: patchwork-linux-omap@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 297B59F479 for ; Sun, 4 Aug 2013 16:29:00 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 2B4F320171 for ; Sun, 4 Aug 2013 16:28:59 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id C8DB82016D for ; Sun, 4 Aug 2013 16:28:57 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753732Ab3HDQ25 (ORCPT ); Sun, 4 Aug 2013 12:28:57 -0400 Received: from bear.ext.ti.com ([192.94.94.41]:54090 "EHLO bear.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753725Ab3HDQ24 (ORCPT ); Sun, 4 Aug 2013 12:28:56 -0400 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by bear.ext.ti.com (8.13.7/8.13.7) with ESMTP id r74GSWi2013272; Sun, 4 Aug 2013 11:28:32 -0500 Received: from DLEE71.ent.ti.com (dlee71.ent.ti.com [157.170.170.114]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id r74GSVgb029058; Sun, 4 Aug 2013 11:28:31 -0500 Received: from dlelxv22.itg.ti.com (172.17.1.197) by DLEE71.ent.ti.com (157.170.170.114) with Microsoft SMTP Server id 14.2.342.3; Sun, 4 Aug 2013 11:28:31 -0500 Received: from ula0131687.itg.ti.com (h81-179.vpn.ti.com [172.24.81.179]) by dlelxv22.itg.ti.com (8.13.8/8.13.8) with ESMTP id r74GRjfX018687; Sun, 4 Aug 2013 11:28:27 -0500 From: Rajendra Nayak To: , CC: , , , , , , , , , , Rajendra Nayak Subject: [PATCH v3 7/9] ARM: DRA7: id: Add cpu detection support for DRA7xx based SoCs' Date: Sun, 4 Aug 2013 21:57:35 +0530 Message-ID: <1375633657-6835-8-git-send-email-rnayak@ti.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1375633657-6835-1-git-send-email-rnayak@ti.com> References: <1375633657-6835-1-git-send-email-rnayak@ti.com> MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Spam-Status: No, score=-5.2 required=5.0 tests=BAYES_00,KHOP_BIG_TO_CC, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: R Sricharan The DRA7xx is a high-performance, infotainment application device, based on enhanced OMAP architecture integrated on a 28-nm technology. Since DRA7 is a platform supported only using DT, the cpu detection is based on the compatibles passed from DT blobs as suggested here http://lists.infradead.org/pipermail/linux-arm-kernel/2013-July/187712.html Suggested-by: Felipe Balbi Signed-off-by: R Sricharan Signed-off-by: Rajendra Nayak Acked-by: Santosh Shilimkar --- arch/arm/mach-omap1/include/mach/soc.h | 1 + arch/arm/mach-omap2/id.c | 4 ++-- arch/arm/mach-omap2/soc.h | 17 +++++++++++++++++ 3 files changed, 20 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-omap1/include/mach/soc.h b/arch/arm/mach-omap1/include/mach/soc.h index 6cf9c1c..612bd1c 100644 --- a/arch/arm/mach-omap1/include/mach/soc.h +++ b/arch/arm/mach-omap1/include/mach/soc.h @@ -195,6 +195,7 @@ IS_OMAP_TYPE(1710, 0x1710) #define cpu_is_omap34xx() 0 #define cpu_is_omap44xx() 0 #define soc_is_omap54xx() 0 +#define soc_is_dra7xx() 0 #define soc_is_am33xx() 0 #define cpu_class_is_omap1() 1 #define cpu_class_is_omap2() 0 diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c index 2dc62a2..0289adc 100644 --- a/arch/arm/mach-omap2/id.c +++ b/arch/arm/mach-omap2/id.c @@ -61,7 +61,7 @@ int omap_type(void) val = omap_ctrl_readl(OMAP343X_CONTROL_STATUS); } else if (cpu_is_omap44xx()) { val = omap_ctrl_readl(OMAP4_CTRL_MODULE_CORE_STATUS); - } else if (soc_is_omap54xx()) { + } else if (soc_is_omap54xx() || soc_is_dra7xx()) { val = omap_ctrl_readl(OMAP5XXX_CONTROL_STATUS); val &= OMAP5_DEVICETYPE_MASK; val >>= 6; @@ -116,7 +116,7 @@ static u16 tap_prod_id; void omap_get_die_id(struct omap_die_id *odi) { - if (cpu_is_omap44xx() || soc_is_omap54xx()) { + if (cpu_is_omap44xx() || soc_is_omap54xx() || soc_is_dra7xx()) { odi->id_0 = read_tap_reg(OMAP_TAP_DIE_ID_44XX_0); odi->id_1 = read_tap_reg(OMAP_TAP_DIE_ID_44XX_1); odi->id_2 = read_tap_reg(OMAP_TAP_DIE_ID_44XX_2); diff --git a/arch/arm/mach-omap2/soc.h b/arch/arm/mach-omap2/soc.h index 8c616e4..4588df1 100644 --- a/arch/arm/mach-omap2/soc.h +++ b/arch/arm/mach-omap2/soc.h @@ -8,6 +8,7 @@ * Written by Tony Lindgren * * Added OMAP4/5 specific defines - Santosh Shilimkar + * Added DRA7xxx specific defines - Sricharan R * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -35,6 +36,7 @@ #ifndef __ASSEMBLY__ #include +#include /* * Test if multicore OMAP support is needed @@ -105,6 +107,15 @@ # endif #endif +#ifdef CONFIG_SOC_DRA7XX +# ifdef OMAP_NAME +# undef MULTI_OMAP2 +# define MULTI_OMAP2 +# else +# define OMAP_NAME DRA7XX +# endif +#endif + /* * Omap device type i.e. EMU/HS/TST/GP/BAD */ @@ -233,6 +244,7 @@ IS_AM_SUBCLASS(437x, 0x437) #define cpu_is_omap447x() 0 #define soc_is_omap54xx() 0 #define soc_is_omap543x() 0 +#define soc_is_dra7xx() 0 #if defined(MULTI_OMAP2) # if defined(CONFIG_ARCH_OMAP2) @@ -379,6 +391,11 @@ IS_OMAP_TYPE(3430, 0x3430) # define soc_is_omap543x() is_omap543x() #endif +#if defined(CONFIG_SOC_DRA7XX) +#undef soc_is_dra7xx +#define soc_is_dra7xx() (of_machine_is_compatible("ti,dra7")) +#endif + /* Various silicon revisions for omap2 */ #define OMAP242X_CLASS 0x24200024 #define OMAP2420_REV_ES1_0 OMAP242X_CLASS