From patchwork Tue Oct 15 05:49:52 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: pekon gupta X-Patchwork-Id: 3043451 Return-Path: X-Original-To: patchwork-linux-omap@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 05A4F9F2B6 for ; Tue, 15 Oct 2013 05:51:24 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 159AC20170 for ; Tue, 15 Oct 2013 05:51:23 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id E27452016C for ; Tue, 15 Oct 2013 05:51:21 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932813Ab3JOFvU (ORCPT ); Tue, 15 Oct 2013 01:51:20 -0400 Received: from comal.ext.ti.com ([198.47.26.152]:43988 "EHLO comal.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932617Ab3JOFvR (ORCPT ); Tue, 15 Oct 2013 01:51:17 -0400 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by comal.ext.ti.com (8.13.7/8.13.7) with ESMTP id r9F5ojfA019914; Tue, 15 Oct 2013 00:50:45 -0500 Received: from DFLE73.ent.ti.com (dfle73.ent.ti.com [128.247.5.110]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id r9F5ojMv020817; Tue, 15 Oct 2013 00:50:45 -0500 Received: from dflp32.itg.ti.com (10.64.6.15) by DFLE73.ent.ti.com (128.247.5.110) with Microsoft SMTP Server id 14.2.342.3; Tue, 15 Oct 2013 00:50:45 -0500 Received: from psplinux063.india.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp32.itg.ti.com (8.14.3/8.13.8) with ESMTP id r9F5oHYZ016248; Tue, 15 Oct 2013 00:50:40 -0500 From: Pekon Gupta To: , , , , , CC: , , , , , , , , , , , Pekon Gupta Subject: [PATCH v9 4/9] mtd: nand: omap: enable auto-detection of bus-width for omap-nand drivers Date: Tue, 15 Oct 2013 11:19:52 +0530 Message-ID: <1381816197-20477-5-git-send-email-pekon@ti.com> X-Mailer: git-send-email 1.8.1 In-Reply-To: <1381816197-20477-1-git-send-email-pekon@ti.com> References: <1381816197-20477-1-git-send-email-pekon@ti.com> MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,KHOP_BIG_TO_CC, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Autodetection of NAND device bus-width was added in generic NAND driver as part of following commit commit 64b37b2a63eb2f80b65c7185f0013f8ffc637ae3 Author: Matthieu CASTET AuthorDate: 2012-11-06 mtd: nand: add NAND_BUSWIDTH_AUTO to autodetect bus width This patch enables this feature for OMAP2 NAND driver Signed-off-by: Pekon Gupta --- drivers/mtd/nand/omap2.c | 29 ++++++++++++++++------------- 1 file changed, 16 insertions(+), 13 deletions(-) diff --git a/drivers/mtd/nand/omap2.c b/drivers/mtd/nand/omap2.c index 5596368..57a3f51 100644 --- a/drivers/mtd/nand/omap2.c +++ b/drivers/mtd/nand/omap2.c @@ -1856,8 +1856,7 @@ static int omap_nand_probe(struct platform_device *pdev) mtd->name = dev_name(&pdev->dev); mtd->owner = THIS_MODULE; nand_chip = &info->nand; - nand_chip->options = pdata->devsize; - nand_chip->options |= NAND_SKIP_BBTSCAN; + nand_chip->options |= NAND_SKIP_BBTSCAN | NAND_BUSWIDTH_AUTO; #ifdef CONFIG_MTD_NAND_OMAP_BCH info->of_node = pdata->of_node; #endif @@ -1904,6 +1903,21 @@ static int omap_nand_probe(struct platform_device *pdev) nand_chip->chip_delay = 50; } + /* scan for NAND device connected to chip controller */ + if (nand_scan_ident(mtd, 1, NULL)) { + err = -ENXIO; + goto out_release_mem_region; + } + if ((nand_chip->options & NAND_BUSWIDTH_16) != + (pdata->devsize & NAND_BUSWIDTH_16)) { + pr_err("%s: detected %s device but driver configured for %s\n", + DRIVER_NAME, + (nand_chip->options & NAND_BUSWIDTH_16) ? "x16" : "x8", + (pdata->devsize & NAND_BUSWIDTH_16) ? "x16" : "x8"); + err = -EINVAL; + goto out_release_mem_region; + } + switch (pdata->xfer_type) { case NAND_OMAP_PREFETCH_POLLED: nand_chip->read_buf = omap_read_buf_pref; @@ -2011,17 +2025,6 @@ static int omap_nand_probe(struct platform_device *pdev) } } - /* DIP switches on some boards change between 8 and 16 bit - * bus widths for flash. Try the other width if the first try fails. - */ - if (nand_scan_ident(mtd, 1, NULL)) { - nand_chip->options ^= NAND_BUSWIDTH_16; - if (nand_scan_ident(mtd, 1, NULL)) { - err = -ENXIO; - goto out_release_mem_region; - } - } - /* rom code layout */ if (pdata->ecc_opt == OMAP_ECC_HAM1_CODE_HW) {