diff mbox

[06/17] spi/qspi: Add support to switc to memory mapped operation.

Message ID 1385451313-1875-7-git-send-email-sourav.poddar@ti.com (mailing list archive)
State New, archived
Headers show

Commit Message

Poddar, Sourav Nov. 26, 2013, 7:35 a.m. UTC
These add apis that can be used to switch to memory mapped operatons
by configuring control module and qspi registers.

Signed-off-by: Sourav Poddar <sourav.poddar@ti.com>
---
 drivers/spi/spi-ti-qspi.c |   28 ++++++++++++++++++++++++++++
 1 files changed, 28 insertions(+), 0 deletions(-)

Comments

Mark Brown Nov. 26, 2013, 12:57 p.m. UTC | #1
On Tue, Nov 26, 2013 at 01:05:02PM +0530, Sourav Poddar wrote:

> +void enable_qspi_memory_mapped(struct ti_qspi *qspi)

> +void disable_qspi_memory_mapped(struct ti_qspi *qspi)

These are driver internal functions so they should be static.  It'd also
be more normal to put the qspi_ at the start of the name though it's not
too big a deal.
Poddar, Sourav Nov. 28, 2013, 4:39 a.m. UTC | #2
On Tuesday 26 November 2013 06:27 PM, Mark Brown wrote:
> On Tue, Nov 26, 2013 at 01:05:02PM +0530, Sourav Poddar wrote:
>
>> +void enable_qspi_memory_mapped(struct ti_qspi *qspi)
>> +void disable_qspi_memory_mapped(struct ti_qspi *qspi)
> These are driver internal functions so they should be static.  It'd also
> be more normal to put the qspi_ at the start of the name though it's not
> too big a deal.
Ok. will change.
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diff mbox

Patch

diff --git a/drivers/spi/spi-ti-qspi.c b/drivers/spi/spi-ti-qspi.c
index 39aefd7..40f1c35 100644
--- a/drivers/spi/spi-ti-qspi.c
+++ b/drivers/spi/spi-ti-qspi.c
@@ -113,6 +113,10 @@  struct ti_qspi {
 #define QSPI_CSPOL(n)			(1 << (1 + n * 8))
 #define QSPI_CKPOL(n)			(1 << (n * 8))
 
+#define MM_SWITCH	(1 << 0)
+#define MEM_CS		(1 << 8)
+#define MEM_CS_DIS	(0 << 8)
+
 #define	QSPI_FRAME			4096
 
 #define QSPI_AUTOSUSPEND_TIMEOUT         2000
@@ -129,6 +133,30 @@  static inline void ti_qspi_write(struct ti_qspi *qspi,
 	writel(val, qspi->base + reg);
 }
 
+void enable_qspi_memory_mapped(struct ti_qspi *qspi)
+{
+	u32 val;
+
+	ti_qspi_write(qspi, MM_SWITCH, QSPI_SPI_SWITCH_REG);
+	if (qspi->ctrl_mod) {
+		val = readl(qspi->ctrl_base);
+		val |= MEM_CS;
+		writel(val, qspi->ctrl_base);
+	}
+}
+
+void disable_qspi_memory_mapped(struct ti_qspi *qspi)
+{
+	u32 val;
+
+	ti_qspi_write(qspi, ~MM_SWITCH, QSPI_SPI_SWITCH_REG);
+	if (qspi->ctrl_mod) {
+		val = readl(qspi->ctrl_base);
+		val &= MEM_CS_DIS;
+		writel(val, qspi->ctrl_base);
+	}
+}
+
 static int ti_qspi_setup(struct spi_device *spi)
 {
 	struct ti_qspi	*qspi = spi_master_get_devdata(spi->master);