From patchwork Fri Dec 6 14:24:46 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Poddar, Sourav" X-Patchwork-Id: 3298511 Return-Path: X-Original-To: patchwork-linux-omap@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 62B9AC0D4A for ; Fri, 6 Dec 2013 14:26:02 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id CB3E520520 for ; Fri, 6 Dec 2013 14:25:57 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 915F0204FB for ; Fri, 6 Dec 2013 14:25:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1759221Ab3LFOZy (ORCPT ); Fri, 6 Dec 2013 09:25:54 -0500 Received: from comal.ext.ti.com ([198.47.26.152]:50958 "EHLO comal.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753539Ab3LFOZv (ORCPT ); Fri, 6 Dec 2013 09:25:51 -0500 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by comal.ext.ti.com (8.13.7/8.13.7) with ESMTP id rB6EPMPA004185; Fri, 6 Dec 2013 08:25:22 -0600 Received: from DLEE70.ent.ti.com (dlemailx.itg.ti.com [157.170.170.113]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id rB6EPLmx015680; Fri, 6 Dec 2013 08:25:21 -0600 Received: from dflp32.itg.ti.com (10.64.6.15) by DLEE70.ent.ti.com (157.170.170.113) with Microsoft SMTP Server id 14.2.342.3; Fri, 6 Dec 2013 08:25:21 -0600 Received: from a0131647.apr.dhcp.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp32.itg.ti.com (8.14.3/8.13.8) with ESMTP id rB6EOqhB000982; Fri, 6 Dec 2013 08:25:18 -0600 From: Sourav Poddar To: , , , CC: , , , , , , Sourav Poddar Subject: [PATCHv2 05/10] spi/qspi: Add api for get_buf/put_buf. Date: Fri, 6 Dec 2013 19:54:46 +0530 Message-ID: <1386339891-32717-6-git-send-email-sourav.poddar@ti.com> X-Mailer: git-send-email 1.7.1 In-Reply-To: <1386339891-32717-1-git-send-email-sourav.poddar@ti.com> References: <1386339891-32717-1-git-send-email-sourav.poddar@ti.com> MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Spam-Status: No, score=-7.1 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Adapt qspi driver to use (get_buf/put_buf) pointers added earlier. These can be called just before the memcpy operations to get hold of the memory mapped address and to turn on the controller clocks. Signed-off-by: Sourav Poddar --- v1->v2: enable/disable memory mapped only when get_buf/put_buf is called (basicaaly only when memory mapped read operation is desired). drivers/spi/spi-ti-qspi.c | 19 +++++++++++++++++++ 1 files changed, 19 insertions(+), 0 deletions(-) diff --git a/drivers/spi/spi-ti-qspi.c b/drivers/spi/spi-ti-qspi.c index e4a8afc..b83583c 100644 --- a/drivers/spi/spi-ti-qspi.c +++ b/drivers/spi/spi-ti-qspi.c @@ -248,6 +248,23 @@ static void ti_qspi_configure_from_slave(struct spi_device *spi) ti_qspi_write(qspi, memval, QSPI_SPI_SETUP0_REG); } +static inline int __iomem *ti_qspi_get_mem_buf(struct spi_master *master) +{ + struct ti_qspi *qspi = spi_master_get_devdata(master); + + pm_runtime_get_sync(qspi->dev); + enable_qspi_memory_mapped(qspi); + return qspi->mmap_base; +} + +static void ti_qspi_put_mem_buf(struct spi_master *master) +{ + struct ti_qspi *qspi = spi_master_get_devdata(master); + + disable_qspi_memory_mapped(qspi); + pm_runtime_put(qspi->dev); +} + static void ti_qspi_restore_ctx(struct ti_qspi *qspi) { struct ti_qspi_regs *ctx_reg = &qspi->ctx_reg; @@ -517,6 +534,8 @@ static int ti_qspi_probe(struct platform_device *pdev) master->bits_per_word_mask = BIT(32 - 1) | BIT(16 - 1) | BIT(8 - 1); master->mmap = true; master->configure_from_slave = ti_qspi_configure_from_slave; + master->get_buf = ti_qspi_get_mem_buf; + master->put_buf = ti_qspi_put_mem_buf; if (!of_property_read_u32(np, "num-cs", &num_cs)) master->num_chipselect = num_cs;