From patchwork Fri Feb 28 20:42:42 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Suman Anna X-Patchwork-Id: 3744071 Return-Path: X-Original-To: patchwork-linux-omap@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 698599F35F for ; Fri, 28 Feb 2014 20:45:10 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 99ED52028D for ; Fri, 28 Feb 2014 20:45:09 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 92FB720260 for ; Fri, 28 Feb 2014 20:45:08 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752356AbaB1UpG (ORCPT ); Fri, 28 Feb 2014 15:45:06 -0500 Received: from devils.ext.ti.com ([198.47.26.153]:57103 "EHLO devils.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752333AbaB1UpB (ORCPT ); Fri, 28 Feb 2014 15:45:01 -0500 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by devils.ext.ti.com (8.13.7/8.13.7) with ESMTP id s1SKiNPv015008; Fri, 28 Feb 2014 14:44:23 -0600 Received: from DLEE70.ent.ti.com (dlee70.ent.ti.com [157.170.170.113]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id s1SKiNgp016080; Fri, 28 Feb 2014 14:44:23 -0600 Received: from dflp33.itg.ti.com (10.64.6.16) by DLEE70.ent.ti.com (157.170.170.113) with Microsoft SMTP Server id 14.3.174.1; Fri, 28 Feb 2014 14:44:23 -0600 Received: from legion.dal.design.ti.com (legion.dal.design.ti.com [128.247.22.53]) by dflp33.itg.ti.com (8.14.3/8.13.8) with ESMTP id s1SKiNJZ016359; Fri, 28 Feb 2014 14:44:23 -0600 Received: from localhost (irmo.am.dhcp.ti.com [128.247.71.175]) by legion.dal.design.ti.com (8.11.7p1+Sun/8.11.7) with ESMTP id s1SKiNt09354; Fri, 28 Feb 2014 14:44:23 -0600 (CST) From: Suman Anna To: Joerg Roedel , Tony Lindgren CC: Florian Vaussard , Laurent Pinchart , , , , , Suman Anna Subject: [PATCHv3 11/13] ARM: OMAP2+: use pdata quirks for iommu reset lines Date: Fri, 28 Feb 2014 14:42:42 -0600 Message-ID: <1393620164-14633-12-git-send-email-s-anna@ti.com> X-Mailer: git-send-email 1.9.0 In-Reply-To: <1393620164-14633-1-git-send-email-s-anna@ti.com> References: <1393620164-14633-1-git-send-email-s-anna@ti.com> MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The OMAP iommu driver performs the reset management for the iommu instances in processor sub-systems using the omap_device API which are currently supplied as platform data ops. Use pdata quirks to maintain the functionality as the OMAP iommu driver gets converted to use DT nodes, until the reset portions are decoupled from omap_hwmod/omap_device into a separate reset driver. This patch adds the pdata quirks for the reset management of iommus within the DSP (OMAP3 & OMAP4) and IPU subsystems (OMAP4). Signed-off-by: Suman Anna --- arch/arm/mach-omap2/pdata-quirks.c | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/arch/arm/mach-omap2/pdata-quirks.c b/arch/arm/mach-omap2/pdata-quirks.c index 3d5b24d..74e094a 100644 --- a/arch/arm/mach-omap2/pdata-quirks.c +++ b/arch/arm/mach-omap2/pdata-quirks.c @@ -16,12 +16,14 @@ #include #include +#include #include "am35xx.h" #include "common.h" #include "common-board-devices.h" #include "dss-common.h" #include "control.h" +#include "omap_device.h" struct pdata_init { const char *compatible; @@ -92,6 +94,12 @@ static void __init hsmmc2_internal_input_clk(void) omap_ctrl_writel(reg, OMAP343X_CONTROL_DEVCONF1); } +static struct iommu_platform_data omap3_iommu_pdata = { + .reset_name = "mmu", + .assert_reset = omap_device_assert_hardreset, + .deassert_reset = omap_device_deassert_hardreset, +}; + static int omap3_sbc_t3730_twl_callback(struct device *dev, unsigned gpio, unsigned ngpio) @@ -185,6 +193,12 @@ static void __init omap4_panda_legacy_init(void) legacy_init_ehci_clk("auxclk3_ck"); legacy_init_wl12xx(WL12XX_REFCLOCK_38, 0, 53); } + +static struct iommu_platform_data omap4_iommu_pdata = { + .reset_name = "mmu_cache", + .assert_reset = omap_device_assert_hardreset, + .deassert_reset = omap_device_deassert_hardreset, +}; #endif #ifdef CONFIG_SOC_OMAP5 @@ -240,6 +254,8 @@ struct of_dev_auxdata omap_auxdata_lookup[] __initdata = { #ifdef CONFIG_ARCH_OMAP3 OF_DEV_AUXDATA("ti,omap3-padconf", 0x48002030, "48002030.pinmux", &pcs_pdata), OF_DEV_AUXDATA("ti,omap3-padconf", 0x48002a00, "48002a00.pinmux", &pcs_pdata), + OF_DEV_AUXDATA("ti,omap2-iommu", 0x5d000000, "5d000000.mmu", + &omap3_iommu_pdata), /* Only on am3517 */ OF_DEV_AUXDATA("ti,davinci_mdio", 0x5c030000, "davinci_mdio.0", NULL), OF_DEV_AUXDATA("ti,am3517-emac", 0x5c000000, "davinci_emac.0", @@ -248,6 +264,10 @@ struct of_dev_auxdata omap_auxdata_lookup[] __initdata = { #ifdef CONFIG_ARCH_OMAP4 OF_DEV_AUXDATA("ti,omap4-padconf", 0x4a100040, "4a100040.pinmux", &pcs_pdata), OF_DEV_AUXDATA("ti,omap4-padconf", 0x4a31e040, "4a31e040.pinmux", &pcs_pdata), + OF_DEV_AUXDATA("ti,omap4-iommu", 0x4a066000, "4a066000.mmu", + &omap4_iommu_pdata), + OF_DEV_AUXDATA("ti,omap4-iommu", 0x55082000, "55082000.mmu", + &omap4_iommu_pdata), #endif { /* sentinel */ }, };