From patchwork Wed Mar 5 08:27:49 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andreas Fenkart X-Patchwork-Id: 3771321 Return-Path: X-Original-To: patchwork-linux-omap@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 787C79F370 for ; Wed, 5 Mar 2014 08:32:55 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 645D12024C for ; Wed, 5 Mar 2014 08:32:54 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 24BC82024F for ; Wed, 5 Mar 2014 08:32:53 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753933AbaCEIcw (ORCPT ); Wed, 5 Mar 2014 03:32:52 -0500 Received: from mail-ee0-f52.google.com ([74.125.83.52]:60593 "EHLO mail-ee0-f52.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752314AbaCEIcu (ORCPT ); Wed, 5 Mar 2014 03:32:50 -0500 Received: by mail-ee0-f52.google.com with SMTP id e49so268377eek.39 for ; Wed, 05 Mar 2014 00:32:48 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=xRWqctSILvg/8RbfNq86aAgUIbFjb1T/a++4u041GvE=; b=ZF28CXX6mC0NpK8IxJNUM06xRN6m0hI9/MFdG0aWWf7Jkg7Qdm93/bTidUW9PYhH/i 5uchY1cCdBHu1woZGjy5B4sBYfp94UjQmnvOQAQia+he3nEb077ZY5+2sB7NvcZ1Cdn8 /XXK+ZrvZTne4T1HFrQtXYuPaO64EvzhC4551c+IlaOyn3l+RnmgvG4LnzAkDd7Efv4o Rihd2W19lIAVVYQlryzN7//qEpReO3nQ2/1+gOSWV/LMKaVZMzUbaVdqVhjFYCt8FPJ4 S9lQ1+lwA5pNgQLHOQ1k0AHGTqlZxpuabZnP5tCaXDCOkSaz/UvFmxo1Pve9UfIgTASu HBNg== X-Received: by 10.14.204.9 with SMTP id g9mr1330182eeo.82.1394008368822; Wed, 05 Mar 2014 00:32:48 -0800 (PST) Received: from localhost (ip-94-112-0-13.net.upcbroadband.cz. [94.112.0.13]) by mx.google.com with ESMTPSA id m42sm6021326eex.21.2014.03.05.00.32.46 for (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Wed, 05 Mar 2014 00:32:48 -0800 (PST) From: Andreas Fenkart To: Chris Ball Cc: Tony Lindgren , Grant Likely , Felipe Balbi , Balaji T K , zonque@gmail.com, galak@codeaurora.org, linux-doc@vger.kernel.org, linux-mmc@vger.kernel.org, linux-omap@vger.kernel.org, Andreas Fenkart Subject: [PATCH v8 2/3] mmc: omap_hsmmc: Pin remux workaround to support SDIO interrupt on AM335x Date: Wed, 5 Mar 2014 09:27:49 +0100 Message-Id: <1394008070-30138-3-git-send-email-afenkart@gmail.com> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1394008070-30138-1-git-send-email-afenkart@gmail.com> References: <1394008070-30138-1-git-send-email-afenkart@gmail.com> Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Spam-Status: No, score=-3.8 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, KHOP_BIG_TO_CC, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, T_DKIM_INVALID,UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The am335x can't detect pending cirq in PM runtime suspend. This patch reconfigures dat1 as a GPIO before going to suspend. SDIO interrupts are detected with the GPIO, the GPIO will only wake the module from suspend, SDIO irq detection will still happen through the IP block. Idea of remuxing the pins and some minor changes by Tony Lindgren. Signed-off-by: Andreas Fenkart Signed-off-by: Tony Lindgren diff --git a/Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt b/Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt index 8c8908a..8e1195e 100644 --- a/Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt +++ b/Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt @@ -55,3 +55,53 @@ Examples: &edma 25>; dma-names = "tx", "rx"; }; + +[workaround for missing swakeup on am33xx] + +This SOC is missing the swakeup line, it will not detect SDIO irq +while in suspend. + + ------ + | PRCM | + ------ + ^ | + swakeup | | fclk + | v + ------ ------- ----- + | card | -- CIRQ --> | hsmmc | -- IRQ --> | CPU | + ------ ------- ----- + +In suspend the fclk is off and the module is disfunctional. Even +register reads will fail. A small logic in the host will request +fclk restore, when an external event is detected. Once the clock +is restored, the host detects the event normally. Since am33xx +doesn't have this line it never wakes from suspend. + +The workaround is to reconfigure the dat1 line as a GPIO upon +suspend. To make this work, we need to set 1) the named pinctrl +states "default", "active" and "idle", 2) the gpio detecting +sdio irq in suspend and 3) compatibe section, see example below. +The MMC driver will then toggle between active and idle during +the runtime. If configuration is incomplete, a warning message is +emitted "falling back to polling". Mind not every application +needs SDIO irq, e.g. MMC cards Affected chips are am335x, +probably others + + + mmc1: mmc@48060100 { + compatible = "ti,am33xx-hsmmc"; + ... + interrupts-extended = <&intc 64 &gpio2 28 0>; + ... + pinctrl-names = "default", "active", "idle" + pinctrl-0 = <&mmc1_pins>; + pinctrl-1 = <&mmc1_pins>; + pinctrl-2 = <&mmc1_cirq_pin>; + ... + }; + + mmc1_cirq_pin: pinmux_cirq_pin { + pinctrl-single,pins = < + 0x0f8 0x3f /* GPIO2_28 */ + >; + }; diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c index 47206c0..16985da 100644 --- a/drivers/mmc/host/omap_hsmmc.c +++ b/drivers/mmc/host/omap_hsmmc.c @@ -224,6 +224,8 @@ struct omap_hsmmc_host { #define HSMMC_SDIO_IRQ_ENABLED (1 << 0) /* SDIO irq enabled */ #define HSMMC_SWAKEUP_QUIRK (1 << 1) struct omap_hsmmc_next next_data; + struct pinctrl *pinctrl; + struct pinctrl_state *fixed, *active, *idle; struct omap_mmc_platform_data *pdata; }; @@ -480,6 +482,70 @@ static void omap_hsmmc_gpio_free(struct omap_mmc_platform_data *pdata) gpio_free(pdata->slots[0].switch_pin); } +static int omap_hsmmc_pin_init(struct omap_hsmmc_host *host) +{ + struct pinctrl *_pinctrl; + int ret; + + _pinctrl = devm_pinctrl_get(host->dev); + if (IS_ERR(_pinctrl)) { + /* okay, if the bootloader set it up right */ + dev_warn(host->dev, "no pinctrl handle\n"); + return 0; + } + + host->fixed = pinctrl_lookup_state(_pinctrl, + PINCTRL_STATE_DEFAULT); + if (IS_ERR(host->fixed)) { + dev_info(host->dev, + "pins are not configured from the driver\n"); + host->fixed = NULL; + devm_pinctrl_put(_pinctrl); + return 0; + } + + ret = pinctrl_select_state(_pinctrl, host->fixed); + if (ret < 0) { + dev_warn(host->dev, "fixed pinctrl state failed %d\n", ret); + goto err; + } + + /* For most cases we don't have wake-ups, and exit after this */ + host->active = pinctrl_lookup_state(_pinctrl, "active"); + if (IS_ERR(host->active)) { + ret = PTR_ERR(host->active); + host->active = NULL; + goto done; + } + + host->idle = pinctrl_lookup_state(_pinctrl, PINCTRL_STATE_IDLE); + if (IS_ERR(host->idle)) { + ret = PTR_ERR(host->idle); + host->idle = NULL; + goto err; + } + + /* Let's make sure the active and idle states work */ + ret = pinctrl_select_state(_pinctrl, host->idle); + if (ret < 0) + goto err; + + ret = pinctrl_select_state(_pinctrl, host->active); + if (ret < 0) + goto err; + + dev_info(mmc_dev(host->mmc), "pins configured for wake-up events\n"); + +done: + host->pinctrl = _pinctrl; + return 0; + +err: + dev_err(mmc_dev(host->mmc), "pins configuration error: %i\n", ret); + devm_pinctrl_put(_pinctrl); + return ret; +} + /* * Start clock to the card */ @@ -1713,8 +1779,14 @@ static int omap_hscmm_configure_wake_irq(struct omap_hsmmc_host *host) * Some omaps don't have wake-up path from deeper idle states * and need to remux SDIO DAT1 to GPIO for wake-up from idle. */ - if (host->pdata->controller_flags & OMAP_HSMMC_SWAKEUP_MISSING) + if (host->pdata->controller_flags & OMAP_HSMMC_SWAKEUP_MISSING) { + if (!host->idle) { + free_irq(host->wake_irq, host); + host->wake_irq = 0; + return -EINVAL; + } host->flags |= HSMMC_SWAKEUP_QUIRK; + } return 0; } @@ -1935,7 +2007,6 @@ static int omap_hsmmc_probe(struct platform_device *pdev) const struct of_device_id *match; dma_cap_mask_t mask; unsigned tx_req, rx_req; - struct pinctrl *pinctrl; match = of_match_device(of_match_ptr(omap_mmc_of_match), &pdev->dev); if (match) { @@ -2162,10 +2233,9 @@ static int omap_hsmmc_probe(struct platform_device *pdev) omap_hsmmc_disable_irq(host); - pinctrl = devm_pinctrl_get_select_default(&pdev->dev); - if (IS_ERR(pinctrl)) - dev_warn(&pdev->dev, - "pins are not configured from the driver\n"); + ret = omap_hsmmc_pin_init(host); + if (ret) + goto err_pinctrl_state; /* * For now, only support SDIO interrupt if we have a separate @@ -2205,7 +2275,10 @@ err_slot_name: mmc_remove_host(mmc); if (host->wake_irq) free_irq(host->wake_irq, host); - if (mmc_slot(host).card_detect_irq) + if (host->pinctrl) + devm_pinctrl_put(host->pinctrl); +err_pinctrl_state: + if ((mmc_slot(host).card_detect_irq)) free_irq(mmc_slot(host).card_detect_irq, host); err_irq_cd: if (host->use_reg) @@ -2260,6 +2333,8 @@ static int omap_hsmmc_remove(struct platform_device *pdev) dma_release_channel(host->tx_chan); if (host->rx_chan) dma_release_channel(host->rx_chan); + if (host->pinctrl) + devm_pinctrl_put(host->pinctrl); pm_runtime_put_sync(host->dev); pm_runtime_disable(host->dev); @@ -2369,6 +2444,11 @@ static int omap_hsmmc_runtime_suspend(struct device *dev) OMAP_HSMMC_WRITE(host->base, ISE, 0); OMAP_HSMMC_WRITE(host->base, IE, 0); OMAP_HSMMC_WRITE(host->base, STAT, STAT_CLEAR); + if (host->idle) { + ret = pinctrl_select_state(host->pinctrl, host->idle); + if (ret < 0) + dev_warn(mmc_dev(host->mmc), "Unable to select idle pinmux\n"); + } hsmmc_enable_wake_irq(host); } @@ -2386,6 +2466,11 @@ static int omap_hsmmc_runtime_resume(struct device *dev) if (host->mmc->caps & MMC_CAP_SDIO_IRQ) { hsmmc_disable_wake_irq(host); + if (host->active) { + ret = pinctrl_select_state(host->pinctrl, host->active); + if (ret < 0) + dev_warn(mmc_dev(host->mmc), "Unable to select active pinmux\n"); + } OMAP_HSMMC_WRITE(host->base, STAT, STAT_CLEAR); OMAP_HSMMC_WRITE(host->base, ISE, CIRQ_EN); OMAP_HSMMC_WRITE(host->base, IE, CIRQ_EN);