From patchwork Mon Mar 10 11:51:01 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Poddar, Sourav" X-Patchwork-Id: 3802491 Return-Path: X-Original-To: patchwork-linux-omap@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 9F3009F369 for ; Mon, 10 Mar 2014 11:51:18 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id C07722024C for ; Mon, 10 Mar 2014 11:51:17 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id A64642022A for ; Mon, 10 Mar 2014 11:51:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753364AbaCJLvP (ORCPT ); Mon, 10 Mar 2014 07:51:15 -0400 Received: from comal.ext.ti.com ([198.47.26.152]:39029 "EHLO comal.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753162AbaCJLvO (ORCPT ); Mon, 10 Mar 2014 07:51:14 -0400 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by comal.ext.ti.com (8.13.7/8.13.7) with ESMTP id s2ABpC0M008068; Mon, 10 Mar 2014 06:51:12 -0500 Received: from DLEE71.ent.ti.com (dlee71.ent.ti.com [157.170.170.114]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id s2ABpC8Y017355; Mon, 10 Mar 2014 06:51:12 -0500 Received: from dflp32.itg.ti.com (10.64.6.15) by DLEE71.ent.ti.com (157.170.170.114) with Microsoft SMTP Server id 14.3.174.1; Mon, 10 Mar 2014 06:51:12 -0500 Received: from ula0131647.india.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp32.itg.ti.com (8.14.3/8.13.8) with ESMTP id s2ABpAx9020648; Mon, 10 Mar 2014 06:51:11 -0500 From: Sourav Poddar To: , , CC: , Sourav Poddar Subject: [PATCHv3 1/2] arm: dts: dra7: Add qspi device. Date: Mon, 10 Mar 2014 17:21:01 +0530 Message-ID: <1394452263-12975-1-git-send-email-sourav.poddar@ti.com> X-Mailer: git-send-email 1.7.9.5 MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP These add device tree entry for qspi controller driver on dra7-evm. Signed-off-by: Sourav Poddar --- Done and tested on top of linux-next + benoit for_15 + tony crossbar branch + crossbar dts patches. v2->v3: This was added as part of the following series, http://www.spinics.net/lists/linux-omap/msg101024.html Few patches of the above series are picked. Sending this dts patch with updates[1] to enable spi mode operations with flash device. [1]: - Enables only SPI mode operations - Add partition table - Add crossbar interrupt value. arch/arm/boot/dts/dra7-evm.dts | 80 ++++++++++++++++++++++++++++++++++++++++ arch/arm/boot/dts/dra7.dtsi | 13 +++++++ 2 files changed, 93 insertions(+) diff --git a/arch/arm/boot/dts/dra7-evm.dts b/arch/arm/boot/dts/dra7-evm.dts index 5babba0..986fcf3 100644 --- a/arch/arm/boot/dts/dra7-evm.dts +++ b/arch/arm/boot/dts/dra7-evm.dts @@ -93,6 +93,21 @@ 0x24c (PIN_INPUT_SLEW | MUX_MODE0) /* uart3_txd */ >; }; + + qspi1_pins: pinmux_qspi1_pins { + pinctrl-single,pins = < + 0x4c (PIN_INPUT | MUX_MODE1) /* gpmc_a3.qspi1_cs2 */ + 0x50 (PIN_INPUT | MUX_MODE1) /* gpmc_a4.qspi1_cs3 */ + 0x74 (PIN_INPUT | MUX_MODE1) /* gpmc_a13.qspi1_rtclk */ + 0x78 (PIN_INPUT | MUX_MODE1) /* gpmc_a14.qspi1_d3 */ + 0x7c (PIN_INPUT | MUX_MODE1) /* gpmc_a15.qspi1_d2 */ + 0x80 (PIN_INPUT | MUX_MODE1) /* gpmc_a16.qspi1_d1 */ + 0x84 (PIN_INPUT | MUX_MODE1) /* gpmc_a17.qspi1_d0 */ + 0x88 (PIN_INPUT | MUX_MODE1) /* qpmc_a18.qspi1_sclk */ + 0xb8 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_cs2.qspi1_cs0 */ + 0xbc (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_cs3.qspi1_cs1 */ + >; + }; }; &i2c1 { @@ -273,3 +288,68 @@ &cpu0 { cpu0-supply = <&smps123_reg>; }; + +&qspi { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&qspi1_pins>; + + spi-max-frequency = <48000000>; + m25p80@0 { + compatible = "s25fl256s1"; + spi-max-frequency = <48000000>; + reg = <0>; + spi-tx-bus-width = <1>; + spi-rx-bus-width = <4>; + spi-cpol; + spi-cpha; + #address-cells = <1>; + #size-cells = <1>; + + /* MTD partition table. + * The ROM checks the first four physical blocks + * for a valid file to boot and the flash here is + * 64KiB block size. + */ + partition@0 { + label = "QSPI.SPL"; + reg = <0x00000000 0x000010000>; + }; + partition@1 { + label = "QSPI.SPL.backup1"; + reg = <0x00010000 0x00010000>; + }; + partition@2 { + label = "QSPI.SPL.backup2"; + reg = <0x00020000 0x00010000>; + }; + partition@3 { + label = "QSPI.SPL.backup3"; + reg = <0x00030000 0x00010000>; + }; + partition@4 { + label = "QSPI.u-boot"; + reg = <0x00040000 0x00180000>; + }; + partition@5 { + label = "QSPI.u-boot-spl-os"; + reg = <0x001c0000 0x00010000>; + }; + partition@6 { + label = "QSPI.u-boot-env"; + reg = <0x001d0000 0x00010000>; + }; + partition@7 { + label = "QSPI.u-boot-env.backup1"; + reg = <0x001e0000 0x0010000>; + }; + partition@8 { + label = "QSPI.kernel"; + reg = <0x001f0000 0x00500000>; + }; + partition@9 { + label = "QSPI.file-system"; + reg = <0x006f0000 0x01910000>; + }; + }; +}; diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi index 5d2ff52..a7a2fa8 100644 --- a/arch/arm/boot/dts/dra7.dtsi +++ b/arch/arm/boot/dts/dra7.dtsi @@ -645,6 +645,19 @@ dma-names = "tx0", "rx0"; status = "disabled"; }; + + qspi: qspi@4b300000 { + compatible = "ti,dra7xxx-qspi"; + reg = <0x4b300000 0x100>; + #address-cells = <1>; + #size-cells = <0>; + ti,hwmods = "qspi"; + clocks = <&qspi_gfclk_div>; + clock-names = "fck"; + num-cs = <4>; + interrupts = <0 343 0x4>; + status = "disabled"; + }; }; };