From patchwork Mon Apr 14 16:25:19 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nishanth Menon X-Patchwork-Id: 3984021 Return-Path: X-Original-To: patchwork-linux-omap@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 4692FBFF02 for ; Mon, 14 Apr 2014 16:42:00 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 629EA201DC for ; Mon, 14 Apr 2014 16:41:59 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 68D252018E for ; Mon, 14 Apr 2014 16:41:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755295AbaDNQkJ (ORCPT ); Mon, 14 Apr 2014 12:40:09 -0400 Received: from comal.ext.ti.com ([198.47.26.152]:50384 "EHLO comal.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755553AbaDNQ0I (ORCPT ); Mon, 14 Apr 2014 12:26:08 -0400 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by comal.ext.ti.com (8.13.7/8.13.7) with ESMTP id s3EGPRbn005428; Mon, 14 Apr 2014 11:25:27 -0500 Received: from DFLE73.ent.ti.com (dfle73.ent.ti.com [128.247.5.110]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id s3EGPRcO002147; Mon, 14 Apr 2014 11:25:27 -0500 Received: from dlep32.itg.ti.com (157.170.170.100) by DFLE73.ent.ti.com (128.247.5.110) with Microsoft SMTP Server id 14.3.174.1; Mon, 14 Apr 2014 11:25:27 -0500 Received: from localhost (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep32.itg.ti.com (8.14.3/8.13.8) with ESMTP id s3EGPRp4032570; Mon, 14 Apr 2014 11:25:27 -0500 From: Nishanth Menon To: Tony Lindgren , Santosh Shilimkar , Sricharan R CC: Sekhar Nori , Rajendra Nayak , Nishanth Menon , Peter Ujfalusi , , , , Subject: [PATCH 08/15] bus: omap_l3_noc: Add support for discountinous flag mux input numbers Date: Mon, 14 Apr 2014 11:25:19 -0500 Message-ID: <1397492726-17203-10-git-send-email-nm@ti.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1397492726-17203-1-git-send-email-nm@ti.com> References: <1397492726-17203-1-git-send-email-nm@ti.com> MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Spam-Status: No, score=-7.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Rajendra Nayak On DRA7, unlike on OMAP4 and OMAP5, the flag mux input numbers used to indicate the source of errors are not continous. Have a way in the driver to catch these and WARN the user of the flag mux input thats either undocumented or wrong. In the similar vein, Timeout errors in AM43x can't be cleared per h/w team, neither does it have a STDERRLOG_MAIN to clear the error. Further, the mux bit offset might not even be indexed into our array of known mux input description, in which case we'd have a abort. So, define a static range check for bit description and any definition which has target_name set to NULL (the ones that are not populated or ones that are specifically marked in the case of discontinous input numbers), can handle the same gracefully. Upon occurance of error from such sources, mask it. Otherwise, we'd have an infinite interrupt source without any means to clear it. [nm@ti.com: rebase, squash and improve] Signed-off-by: Rajendra Nayak Signed-off-by: Afzal Mohammed Signed-off-by: Nishanth Menon --- drivers/bus/omap_l3_noc.c | 31 +++++++++++++++++++++++++++++++ drivers/bus/omap_l3_noc.h | 11 ++++++++--- 2 files changed, 39 insertions(+), 3 deletions(-) diff --git a/drivers/bus/omap_l3_noc.c b/drivers/bus/omap_l3_noc.c index da4e27c..c2b0cc3 100644 --- a/drivers/bus/omap_l3_noc.c +++ b/drivers/bus/omap_l3_noc.c @@ -79,10 +79,41 @@ static irqreturn_t l3_interrupt_handler(int irq, void *_l3) /* Identify the source from control status register */ err_src = __ffs(err_reg); + + /* We DONOT expect err_src to go out of bounds */ + BUG_ON(err_src >= MAX_CLKDM_TARGETS); + l3_targ_inst = &l3_targ[i][err_src]; target_name = l3_targ_inst->name; l3_targ_base = base + l3_targ_inst->offset; + /* + * If we do not know of a register offset to decode + * and clear, then mask. + */ + if (target_name == L3_TARGET_NOT_SUPPORTED) { + u32 mask_val; + void __iomem *mask_reg; + + /* + * Certain plaforms may have "undocumented" + * status pending on boot.. So dont generate + * a severe warning here. + */ + dev_err(l3->dev, + "L3 %s error: target %d mod:%d %s\n", + inttype ? "debug" : "application", + err_src, i, "(unclearable)"); + + mask_reg = base + l3_flagmux[i] + + L3_FLAGMUX_MASK0 + (inttype << 3); + mask_val = readl(mask_reg); + mask_val &= ~(1 << err_src); + writel(mask_val, mask_reg); + + break; + } + /* Read the stderrlog_main_source from clk domain */ l3_targ_stderr = l3_targ_base + L3_TARG_STDERRLOG_MAIN; l3_targ_slvofslsb = l3_targ_base + diff --git a/drivers/bus/omap_l3_noc.h b/drivers/bus/omap_l3_noc.h index 25ba99c..c4a1760 100644 --- a/drivers/bus/omap_l3_noc.h +++ b/drivers/bus/omap_l3_noc.h @@ -30,6 +30,11 @@ #define L3_TARG_STDERRLOG_SLVOFSLSB 0x5c #define L3_TARG_STDERRLOG_MSTADDR 0x68 #define L3_FLAGMUX_REGERR0 0xc +#define L3_FLAGMUX_MASK0 0x8 + +#define L3_TARGET_NOT_SUPPORTED NULL + +#define MAX_CLKDM_TARGETS 30 #define NUM_OF_L3_MASTERS (sizeof(l3_masters)/sizeof(l3_masters[0])) @@ -61,7 +66,7 @@ static u32 l3_flagmux[L3_MODULES] = { 0X0200 }; -static struct l3_target_data l3_target_inst_data_clk1[] = { +static struct l3_target_data l3_target_inst_data_clk1[MAX_CLKDM_TARGETS] = { {0x100, "DMM1",}, {0x200, "DMM2",}, {0x300, "ABE",}, @@ -71,7 +76,7 @@ static struct l3_target_data l3_target_inst_data_clk1[] = { {0x900, "L4WAKEUP",}, }; -static struct l3_target_data l3_target_inst_data_clk2[] = { +static struct l3_target_data l3_target_inst_data_clk2[MAX_CLKDM_TARGETS] = { {0x500, "CORTEXM3",}, {0x300, "DSS",}, {0x100, "GPMC",}, @@ -95,7 +100,7 @@ static struct l3_target_data l3_target_inst_data_clk2[] = { {0x1700, "LLI",}, }; -static struct l3_target_data l3_target_inst_data_clk3[] = { +static struct l3_target_data l3_target_inst_data_clk3[MAX_CLKDM_TARGETS] = { {0x0100, "EMUSS",}, {0x0300, "DEBUG SOURCE",}, {0x0, "HOST CLK3",},