From patchwork Sun May 11 11:28:57 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andreas Fenkart X-Patchwork-Id: 4150331 Return-Path: X-Original-To: patchwork-linux-omap@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 58BF79F23C for ; Sun, 11 May 2014 11:30:41 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 8E1CB2028D for ; Sun, 11 May 2014 11:30:40 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id E2480202F0 for ; Sun, 11 May 2014 11:30:38 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932314AbaEKLag (ORCPT ); Sun, 11 May 2014 07:30:36 -0400 Received: from mail-ve0-f177.google.com ([209.85.128.177]:38753 "EHLO mail-ve0-f177.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932092AbaEKLaf (ORCPT ); Sun, 11 May 2014 07:30:35 -0400 Received: by mail-ve0-f177.google.com with SMTP id db11so7334834veb.36 for ; Sun, 11 May 2014 04:30:34 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=QL4eGaL2JdKrHvjWiHMZEtw9BVinN/RYdMJQfg8s1ns=; b=v2Gai2rryxL7Ak/UVI5arbDpCIz8kbLgmVvUe9yy4vA/7ivdnuUpAM3JfRAjBXi6z7 LmonGeagOxFNH6DLb4fATNMVkgiIi2YCcSVi0HkwcinWs+MkvBnzq3mX+eVoHBfycegb o1wbz6Vp+gIPFiw0gmg0VMsu68KbklYBAR0YlNYNcJoUJcZBDTxgc4oJbR8be8//1/YG KwuvitLTOwMkmi5jzxVM3dNLYZVfddUkaFYt9IiEBPRUrng9x9uTyU/BwyiqnJd0L89d DrIYF5F0+s4sKq1bFdDEKTLaTVRlwHI8Xsp++vxpG3up3UzrRcxXwQBXySPRJcOUNxTT gS4A== X-Received: by 10.221.29.137 with SMTP id ry9mr18064853vcb.6.1399807834636; Sun, 11 May 2014 04:30:34 -0700 (PDT) Received: from localhost (ip-89-176-190-91.net.upcbroadband.cz. [89.176.190.91]) by mx.google.com with ESMTPSA id dv3sm2214220vec.14.2014.05.11.04.30.31 for (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Sun, 11 May 2014 04:30:34 -0700 (PDT) From: Andreas Fenkart To: Tony Lindgren Cc: Chris Ball , Grant Likely , Felipe Balbi , Balaji T K , Andreas Mueller , Sebastian Reichel , zonque@gmail.com, galak@codeaurora.org, linux-doc@vger.kernel.org, linux-mmc@vger.kernel.org, linux-omap@vger.kernel.org, Andreas Fenkart Subject: [PATCH v11 5/6] mmc: omap_hsmmc: switch default/idle pinctrl states in runtime hooks Date: Sun, 11 May 2014 13:28:57 +0200 Message-Id: <1399807738-32223-6-git-send-email-afenkart@gmail.com> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1399807738-32223-1-git-send-email-afenkart@gmail.com> References: <1399807738-32223-1-git-send-email-afenkart@gmail.com> Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Spam-Status: No, score=-7.4 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP These are predefined states of the driver model. When not present, as if not set in the device tree, they become no-ops. Explicitly selecting the default state is not needed since the device core layer sets pin mux to "default" state before probe. This is not the simplest implementation, on AM335x at least, we could switch to idle at any point in the suspend hook, only the default state needs to be set before writing to the irq registers or an IRQ might get lost. Acked-by: Balaji T K Signed-off-by: Andreas Fenkart diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c index 30365f5..3c8b183 100644 --- a/drivers/mmc/host/omap_hsmmc.c +++ b/drivers/mmc/host/omap_hsmmc.c @@ -2002,7 +2002,6 @@ static int omap_hsmmc_probe(struct platform_device *pdev) const struct of_device_id *match; dma_cap_mask_t mask; unsigned tx_req, rx_req; - struct pinctrl *pinctrl; const struct omap_mmc_of_data *data; match = of_match_device(of_match_ptr(omap_mmc_of_match), &pdev->dev); @@ -2226,11 +2225,6 @@ static int omap_hsmmc_probe(struct platform_device *pdev) omap_hsmmc_disable_irq(host); - pinctrl = devm_pinctrl_get_select_default(&pdev->dev); - if (IS_ERR(pinctrl)) - dev_warn(&pdev->dev, - "pins are not configured from the driver\n"); - /* * For now, only support SDIO interrupt if we have a separate * wake-up interrupt configured from device tree. This is because @@ -2454,10 +2448,15 @@ static int omap_hsmmc_runtime_suspend(struct device *dev) goto abort; } + pinctrl_pm_select_idle_state(dev); + WARN_ON(host->flags & HSMMC_WAKE_IRQ_ENABLED); enable_irq(host->wake_irq); host->flags |= HSMMC_WAKE_IRQ_ENABLED; + } else { + pinctrl_pm_select_idle_state(dev); } + abort: spin_unlock_irqrestore(&host->irq_lock, flags); return ret; @@ -2481,9 +2480,14 @@ static int omap_hsmmc_runtime_resume(struct device *dev) host->flags &= ~HSMMC_WAKE_IRQ_ENABLED; } + pinctrl_pm_select_default_state(host->dev); + + /* irq lost, if pinmux incorrect */ OMAP_HSMMC_WRITE(host->base, STAT, STAT_CLEAR); OMAP_HSMMC_WRITE(host->base, ISE, CIRQ_EN); OMAP_HSMMC_WRITE(host->base, IE, CIRQ_EN); + } else { + pinctrl_pm_select_default_state(host->dev); } spin_unlock_irqrestore(&host->irq_lock, flags); return 0;