From patchwork Fri May 23 08:30:33 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andreas Fenkart X-Patchwork-Id: 4228981 Return-Path: X-Original-To: patchwork-linux-omap@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 6971A9F1CD for ; Fri, 23 May 2014 08:32:02 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 971F7202DD for ; Fri, 23 May 2014 08:32:01 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id B3B112017D for ; Fri, 23 May 2014 08:32:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752010AbaEWIb4 (ORCPT ); Fri, 23 May 2014 04:31:56 -0400 Received: from mail-ee0-f43.google.com ([74.125.83.43]:56372 "EHLO mail-ee0-f43.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751573AbaEWIby (ORCPT ); Fri, 23 May 2014 04:31:54 -0400 Received: by mail-ee0-f43.google.com with SMTP id d17so3378221eek.2 for ; Fri, 23 May 2014 01:31:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=5oAOUktm2TlN6uLuxNdh6dr4ovFxAfgPYV5iEUM12B0=; b=TluM1ZlzKVmi6hm4fkqbDa4LRuejs/b2RgJOXicEA5aERdgHnjWLSEYf1/fQCThqgS T5InwOQ149aLpdPVg2Pvd2c0zd/XAgZNFmJycfC6RmipKn4ib+WanxphBvdK+GeHIzvh 7RpUGltVaSJvRyMliZDb0PpeTenP12DljdYrn5B5Mn9DxL4g91W8DLKmCMGWfued0IAv Gstf/F/prkGiwNBN60kvcP0+eqlBeyNgMuikrFp5m60+0WaLszyyBBpZ99baeydTumlo zlA5x1aA8fUye5CbZG0TVKLSma78bPfppEmchgsUxvwvqLiWM3TU88qzAHY4em0WUkPs E0/A== X-Received: by 10.14.202.5 with SMTP id c5mr1137694eeo.94.1400833912452; Fri, 23 May 2014 01:31:52 -0700 (PDT) Received: from localhost (ip-89-176-190-91.net.upcbroadband.cz. [89.176.190.91]) by mx.google.com with ESMTPSA id m44sm6593264eeh.14.2014.05.23.01.31.50 for (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Fri, 23 May 2014 01:31:51 -0700 (PDT) From: Andreas Fenkart To: Tony Lindgren Cc: Chris Ball , Grant Likely , Felipe Balbi , Balaji T K , Andreas Mueller , Sebastian Reichel , zonque@gmail.com, galak@codeaurora.org, linux-doc@vger.kernel.org, linux-mmc@vger.kernel.org, linux-omap@vger.kernel.org, Andreas Fenkart Subject: [PATCH v13 6/7] mmc: omap_hsmmc: switch default/idle pinctrl states in runtime hooks Date: Fri, 23 May 2014 10:30:33 +0200 Message-Id: <1400833834-15893-7-git-send-email-afenkart@gmail.com> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1400833834-15893-1-git-send-email-afenkart@gmail.com> References: <1400833834-15893-1-git-send-email-afenkart@gmail.com> Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Spam-Status: No, score=-7.4 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP These are predefined states of the driver model. When not present, as if not set in the device tree, they become no-ops. Explicitly selecting the default state is not needed since the device core layer sets pin mux to "default" state before probe. This is not the simplest implementation, on AM335x at least, we could switch to idle at any point in the suspend hook, only the default state needs to be set before writing to the irq registers or an IRQ might get lost. Acked-by: Balaji T K Signed-off-by: Andreas Fenkart diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c index aafef29..760b0ac 100644 --- a/drivers/mmc/host/omap_hsmmc.c +++ b/drivers/mmc/host/omap_hsmmc.c @@ -2008,7 +2008,6 @@ static int omap_hsmmc_probe(struct platform_device *pdev) const struct of_device_id *match; dma_cap_mask_t mask; unsigned tx_req, rx_req; - struct pinctrl *pinctrl; const struct omap_mmc_of_data *data; match = of_match_device(of_match_ptr(omap_mmc_of_match), &pdev->dev); @@ -2234,11 +2233,6 @@ static int omap_hsmmc_probe(struct platform_device *pdev) omap_hsmmc_disable_irq(host); - pinctrl = devm_pinctrl_get_select_default(&pdev->dev); - if (IS_ERR(pinctrl)) - dev_warn(&pdev->dev, - "pins are not configured from the driver\n"); - /* * For now, only support SDIO interrupt if we have a separate * wake-up interrupt configured from device tree. This is because @@ -2463,10 +2457,15 @@ static int omap_hsmmc_runtime_suspend(struct device *dev) goto abort; } + pinctrl_pm_select_idle_state(dev); + WARN_ON(host->flags & HSMMC_WAKE_IRQ_ENABLED); enable_irq(host->wake_irq); host->flags |= HSMMC_WAKE_IRQ_ENABLED; + } else { + pinctrl_pm_select_idle_state(dev); } + abort: spin_unlock_irqrestore(&host->irq_lock, flags); return ret; @@ -2490,9 +2489,14 @@ static int omap_hsmmc_runtime_resume(struct device *dev) host->flags &= ~HSMMC_WAKE_IRQ_ENABLED; } + pinctrl_pm_select_default_state(host->dev); + + /* irq lost, if pinmux incorrect */ OMAP_HSMMC_WRITE(host->base, STAT, STAT_CLEAR); OMAP_HSMMC_WRITE(host->base, ISE, CIRQ_EN); OMAP_HSMMC_WRITE(host->base, IE, CIRQ_EN); + } else { + pinctrl_pm_select_default_state(host->dev); } spin_unlock_irqrestore(&host->irq_lock, flags); return 0;