From patchwork Mon May 26 09:56:34 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "J, KEERTHY" X-Patchwork-Id: 4241131 Return-Path: X-Original-To: patchwork-linux-omap@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 85B3A9F1E7 for ; Mon, 26 May 2014 09:59:33 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 8CC13201B4 for ; Mon, 26 May 2014 09:59:32 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 9C8CF2012E for ; Mon, 26 May 2014 09:59:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752094AbaEZJ6M (ORCPT ); Mon, 26 May 2014 05:58:12 -0400 Received: from bear.ext.ti.com ([192.94.94.41]:36945 "EHLO bear.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750914AbaEZJ6J (ORCPT ); Mon, 26 May 2014 05:58:09 -0400 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by bear.ext.ti.com (8.13.7/8.13.7) with ESMTP id s4Q9w5IJ022217; Mon, 26 May 2014 04:58:05 -0500 Received: from DLEE70.ent.ti.com (dlee70.ent.ti.com [157.170.170.113]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id s4Q9w54W002673; Mon, 26 May 2014 04:58:05 -0500 Received: from dflp32.itg.ti.com (10.64.6.15) by DLEE70.ent.ti.com (157.170.170.113) with Microsoft SMTP Server id 14.3.174.1; Mon, 26 May 2014 04:58:05 -0500 Received: from ula0393675.apr.dhcp.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp32.itg.ti.com (8.14.3/8.13.8) with ESMTP id s4Q9vtje017650; Mon, 26 May 2014 04:58:02 -0500 From: Keerthy To: CC: , , , , , Keerthy Subject: [PATCH 2/5] Regulators: Add TPS65917 Bindings Date: Mon, 26 May 2014 15:26:34 +0530 Message-ID: <1401098197-647-3-git-send-email-j-keerthy@ti.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1401098197-647-1-git-send-email-j-keerthy@ti.com> References: <1401098197-647-1-git-send-email-j-keerthy@ti.com> MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Spam-Status: No, score=-7.5 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add TPS65917 Bindings. Signed-off-by: Keerthy --- .../bindings/regulator/tps65917-pmic.txt | 67 ++++++++++++++++++++ 1 file changed, 67 insertions(+) create mode 100644 Documentation/devicetree/bindings/regulator/tps65917-pmic.txt diff --git a/Documentation/devicetree/bindings/regulator/tps65917-pmic.txt b/Documentation/devicetree/bindings/regulator/tps65917-pmic.txt new file mode 100644 index 0000000..96d1fb7 --- /dev/null +++ b/Documentation/devicetree/bindings/regulator/tps65917-pmic.txt @@ -0,0 +1,67 @@ +* tps65917 regulator IP block devicetree bindings + +Required properties: +- compatible : Should be + ti,tps65917-pmic + +- interrupt-parent : The parent interrupt controller which is tps65917. +- interrupts : The interrupt number and the type which can be looked up here: + arch/arm/boot/dts/include/dt-bindings/interrupt-controller/irq.h +- interrupts-name: The names of the individual interrupts. + +Optional nodes: +- regulators : Must contain a sub-node per regulator from the list below. + Each sub-node should contain the constraints and initialization + information for that regulator. See regulator.txt for a + description of standard properties for these sub-nodes. + Additional custom properties are listed below. + + Optional sub-node properties: + ti,warm-reset - maintain voltage during warm reset(boolean) + ti,roof-floor - This takes as optional argument on platform supporting + the rail from desired external control. If there is no argument then + it will be assume that it is controlled by NSLEEP pin. + The valid value for external pins are: + ENABLE1 then 1, + ENABLE2 then 2 or + NSLEEP then 3. + ti,mode-sleep - mode to adopt in pmic sleep 0 - off, 1 - auto, + 2 - eco, 3 - forced pwm + ti,smps-range - OTP has the wrong range set for the hardware so override + 0 - low range, 1 - high range. + +- ti,system-power-controller: Telling whether or not this pmic is controlling + the system power. + +Example: + +#include + +pmic { + compatible = "ti,tps65917-pmic"; + interrupt-parent = <&tps65917>; + interrupts = <14 IRQ_TYPE_NONE>; + interrupts-name = "short-irq"; + + ti,system-power-controller; + + regulators { + smps1_reg : smps1 { + regulator-name = "smps1"; + regulator-min-microvolt = < 600000>; + regulator-max-microvolt = <1500000>; + regulator-always-on; + regulator-boot-on; + ti,warm-reset; + ti,roof-floor = <1>; /* ENABLE1 control */ + ti,mode-sleep = <0>; + ti,smps-range = <1>; + }; + + ldo1_reg: ldo1 { + regulator-name = "ldo1"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + }; + }; +};