Message ID | 1401274255-16845-5-git-send-email-archit@ti.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi index 149b550..14d1905 100644 --- a/arch/arm/boot/dts/dra7.dtsi +++ b/arch/arm/boot/dts/dra7.dtsi @@ -148,6 +148,19 @@ }; }; + ctrl_core: ctrl_core@4a002000 { + compatible = "ti,dra7-ctrl-core"; + reg = <0x4a002000 0x6d0>; + + ctrl_core_clocks: clocks { + #address-cells = <1>; + #size-cells = <0>; + }; + + ctrl_core_clockdomains: clockdomains { + }; + }; + counter32k: counter@4ae04000 { compatible = "ti,omap-counter32k"; reg = <0x4ae04000 0x40>;
Add DT node for the ctrl-core sub module of the DRA7 control module. We map the CTRL_MODULE_CORE address region up to 0x4a002d60, this region contains register fields which configure clocks. The remainder of the registers are related to pad configurations or cross-bar configurations, and therefore aren't mapped. Signed-off-by: Archit Taneja <archit@ti.com> --- arch/arm/boot/dts/dra7.dtsi | 13 +++++++++++++ 1 file changed, 13 insertions(+)