From patchwork Thu May 29 08:28:04 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andreas Fenkart X-Patchwork-Id: 4263111 Return-Path: X-Original-To: patchwork-linux-omap@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id D8A05BF90B for ; Thu, 29 May 2014 08:29:32 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 1D9BE201C7 for ; Thu, 29 May 2014 08:29:32 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 2377F202DD for ; Thu, 29 May 2014 08:29:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932905AbaE2I32 (ORCPT ); Thu, 29 May 2014 04:29:28 -0400 Received: from mail-ob0-f179.google.com ([209.85.214.179]:53285 "EHLO mail-ob0-f179.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932431AbaE2I30 (ORCPT ); Thu, 29 May 2014 04:29:26 -0400 Received: by mail-ob0-f179.google.com with SMTP id vb8so7742obc.10 for ; Thu, 29 May 2014 01:29:25 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=NuUFVBQ0t64czF0CklyeCAob9Yle19oqi9KIGE4V7E8=; b=LrLstuqppuD2jGuA5y4MojtewyOD0atbAtqkjWfYs/0bWi8BqEclupgmovzLTOAZrm 38PFOWtFa+KJ1moxyB9GwGmy/vY2Dm/k/hG2PQDmFe1Xut4HmM3+s+Dw+V6kL/VvAcWt 2pcc023qVXRKMpkQrhfK9PFwTkgLGxE8i569Nb1J3O7nDbpkW213kpnytjKYKugBZgoY nJ5x5ZXqg17PiRNngdcr8mxlKaZLBN+eK/luTBgMg7epSTbP8dd9KB3T8CrrTrSN/kM+ chueMmf+1NNdLhU1TOYb3VK47CCTg8R1ey28Cw8L+wM/ypgu0Wxs/OBh9VUBhJ67pe90 jxng== X-Received: by 10.182.232.135 with SMTP id to7mr6034642obc.73.1401352165653; Thu, 29 May 2014 01:29:25 -0700 (PDT) Received: from localhost (ip-89-176-190-91.net.upcbroadband.cz. [89.176.190.91]) by mx.google.com with ESMTPSA id g3sm39174045obd.18.2014.05.29.01.29.22 for (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Thu, 29 May 2014 01:29:25 -0700 (PDT) From: Andreas Fenkart To: Tony Lindgren Cc: Chris Ball , Grant Likely , Felipe Balbi , Balaji T K , Andreas Mueller , Sebastian Reichel , zonque@gmail.com, galak@codeaurora.org, linux-doc@vger.kernel.org, linux-mmc@vger.kernel.org, linux-omap@vger.kernel.org, Andreas Fenkart Subject: [PATCH v14 5/6] mmc: omap_hsmmc: switch default/idle pinctrl states in runtime hooks Date: Thu, 29 May 2014 10:28:04 +0200 Message-Id: <1401352085-22781-6-git-send-email-afenkart@gmail.com> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1401352085-22781-1-git-send-email-afenkart@gmail.com> References: <1401352085-22781-1-git-send-email-afenkart@gmail.com> Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Spam-Status: No, score=-7.4 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP These are predefined states of the driver model. When not present, as if not set in the device tree, they become no-ops. Explicitly selecting the default state is not needed since the device core layer sets pin mux to "default" state before probe. This is not the simplest implementation, on AM335x at least, we could switch to idle at any point in the suspend hook, only the default state needs to be set before writing to the irq registers or an IRQ might get lost. Acked-by: Balaji T K Signed-off-by: Andreas Fenkart diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c index 2408ec9..0febb17 100644 --- a/drivers/mmc/host/omap_hsmmc.c +++ b/drivers/mmc/host/omap_hsmmc.c @@ -1998,7 +1998,6 @@ static int omap_hsmmc_probe(struct platform_device *pdev) const struct of_device_id *match; dma_cap_mask_t mask; unsigned tx_req, rx_req; - struct pinctrl *pinctrl; const struct omap_mmc_of_data *data; void __iomem *base; @@ -2222,11 +2221,6 @@ static int omap_hsmmc_probe(struct platform_device *pdev) omap_hsmmc_disable_irq(host); - pinctrl = devm_pinctrl_get_select_default(&pdev->dev); - if (IS_ERR(pinctrl)) - dev_warn(&pdev->dev, - "pins are not configured from the driver\n"); - /* * For now, only support SDIO interrupt if we have a separate * wake-up interrupt configured from device tree. This is because @@ -2428,10 +2422,15 @@ static int omap_hsmmc_runtime_suspend(struct device *dev) goto abort; } + pinctrl_pm_select_idle_state(dev); + WARN_ON(host->flags & HSMMC_WAKE_IRQ_ENABLED); enable_irq(host->wake_irq); host->flags |= HSMMC_WAKE_IRQ_ENABLED; + } else { + pinctrl_pm_select_idle_state(dev); } + abort: spin_unlock_irqrestore(&host->irq_lock, flags); return ret; @@ -2455,9 +2454,14 @@ static int omap_hsmmc_runtime_resume(struct device *dev) host->flags &= ~HSMMC_WAKE_IRQ_ENABLED; } + pinctrl_pm_select_default_state(host->dev); + + /* irq lost, if pinmux incorrect */ OMAP_HSMMC_WRITE(host->base, STAT, STAT_CLEAR); OMAP_HSMMC_WRITE(host->base, ISE, CIRQ_EN); OMAP_HSMMC_WRITE(host->base, IE, CIRQ_EN); + } else { + pinctrl_pm_select_default_state(host->dev); } spin_unlock_irqrestore(&host->irq_lock, flags); return 0;