From patchwork Wed Jun 25 00:43:40 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Suman Anna X-Patchwork-Id: 4415461 Return-Path: X-Original-To: patchwork-linux-omap@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id CBE759F402 for ; Wed, 25 Jun 2014 00:44:52 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id ECC172037A for ; Wed, 25 Jun 2014 00:44:51 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id EE039201EF for ; Wed, 25 Jun 2014 00:44:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752955AbaFYAou (ORCPT ); Tue, 24 Jun 2014 20:44:50 -0400 Received: from arroyo.ext.ti.com ([192.94.94.40]:33831 "EHLO arroyo.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752920AbaFYAot (ORCPT ); Tue, 24 Jun 2014 20:44:49 -0400 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by arroyo.ext.ti.com (8.13.7/8.13.7) with ESMTP id s5P0iTEF008857; Tue, 24 Jun 2014 19:44:29 -0500 Received: from DLEE71.ent.ti.com (dlee71.ent.ti.com [157.170.170.114]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id s5P0iTfE000431; Tue, 24 Jun 2014 19:44:29 -0500 Received: from dflp33.itg.ti.com (10.64.6.16) by DLEE71.ent.ti.com (157.170.170.114) with Microsoft SMTP Server id 14.3.174.1; Tue, 24 Jun 2014 19:44:29 -0500 Received: from legion.dal.design.ti.com (legion.dal.design.ti.com [128.247.22.53]) by dflp33.itg.ti.com (8.14.3/8.13.8) with ESMTP id s5P0iSj3022754; Tue, 24 Jun 2014 19:44:28 -0500 Received: from localhost (irmo.am.dhcp.ti.com [128.247.71.175]) by legion.dal.design.ti.com (8.11.7p1+Sun/8.11.7) with ESMTP id s5P0iSt21962; Tue, 24 Jun 2014 19:44:28 -0500 (CDT) From: Suman Anna To: Tony Lindgren CC: Dave Gerlach , Jassi Brar , , , Suman Anna Subject: [PATCH 4/7] mailbox/omap: simplify the fifo assignment by using macros Date: Tue, 24 Jun 2014 19:43:40 -0500 Message-ID: <1403657023-53897-5-git-send-email-s-anna@ti.com> X-Mailer: git-send-email 2.0.0 In-Reply-To: <1403657023-53897-1-git-send-email-s-anna@ti.com> References: <1403657023-53897-1-git-send-email-s-anna@ti.com> MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The OMAP mailbox IP has two different type of interrupt configuration registers between OMAP4+ SoCs and OMAP2/3 SoCs. Simplify the current interrupt configuration by using a single macro that translates the two variants. Signed-off-by: Suman Anna --- drivers/mailbox/mailbox-omap2.c | 29 ++++++++++++++++------------- 1 file changed, 16 insertions(+), 13 deletions(-) diff --git a/drivers/mailbox/mailbox-omap2.c b/drivers/mailbox/mailbox-omap2.c index b44e3bc..2c463d6 100644 --- a/drivers/mailbox/mailbox-omap2.c +++ b/drivers/mailbox/mailbox-omap2.c @@ -25,13 +25,21 @@ #define MAILBOX_MESSAGE(m) (0x040 + 4 * (m)) #define MAILBOX_FIFOSTATUS(m) (0x080 + 4 * (m)) #define MAILBOX_MSGSTATUS(m) (0x0c0 + 4 * (m)) -#define MAILBOX_IRQSTATUS(u) (0x100 + 8 * (u)) -#define MAILBOX_IRQENABLE(u) (0x104 + 8 * (u)) + +#define OMAP2_MAILBOX_IRQSTATUS(u) (0x100 + 8 * (u)) +#define OMAP2_MAILBOX_IRQENABLE(u) (0x104 + 8 * (u)) #define OMAP4_MAILBOX_IRQSTATUS(u) (0x104 + 0x10 * (u)) #define OMAP4_MAILBOX_IRQENABLE(u) (0x108 + 0x10 * (u)) #define OMAP4_MAILBOX_IRQENABLE_CLR(u) (0x10c + 0x10 * (u)) +#define MAILBOX_IRQSTATUS(type, u) (type ? OMAP4_MAILBOX_IRQSTATUS(u) : \ + OMAP2_MAILBOX_IRQSTATUS(u)) +#define MAILBOX_IRQENABLE(type, u) (type ? OMAP4_MAILBOX_IRQENABLE(u) : \ + OMAP2_MAILBOX_IRQENABLE(u)) +#define MAILBOX_IRQDISABLE(type, u) (type ? OMAP4_MAILBOX_IRQENABLE_CLR(u) \ + : OMAP2_MAILBOX_IRQENABLE(u)) + #define MAILBOX_IRQ_NEWMSG(m) (1 << (2 * (m))) #define MAILBOX_IRQ_NOTFULL(m) (1 << (2 * (m) + 1)) @@ -227,6 +235,7 @@ static int omap2_mbox_probe(struct platform_device *pdev) struct omap_mbox2_priv *priv, *privblk; struct omap_mbox_pdata *pdata = pdev->dev.platform_data; struct omap_mbox_dev_info *info; + u32 intr_type; int i; if (!pdata || !pdata->info_cnt || !pdata->info) { @@ -251,6 +260,7 @@ static int omap2_mbox_probe(struct platform_device *pdev) return -ENOMEM; info = pdata->info; + intr_type = pdata->intr_type; mbox = mboxblk; priv = privblk; for (i = 0; i < pdata->info_cnt; i++, info++, priv++) { @@ -260,17 +270,10 @@ static int omap2_mbox_probe(struct platform_device *pdev) priv->rx_fifo.msg_stat = MAILBOX_MSGSTATUS(info->rx_id); priv->notfull_bit = MAILBOX_IRQ_NOTFULL(info->tx_id); priv->newmsg_bit = MAILBOX_IRQ_NEWMSG(info->rx_id); - if (pdata->intr_type) { - priv->irqenable = OMAP4_MAILBOX_IRQENABLE(info->usr_id); - priv->irqstatus = OMAP4_MAILBOX_IRQSTATUS(info->usr_id); - priv->irqdisable = - OMAP4_MAILBOX_IRQENABLE_CLR(info->usr_id); - } else { - priv->irqenable = MAILBOX_IRQENABLE(info->usr_id); - priv->irqstatus = MAILBOX_IRQSTATUS(info->usr_id); - priv->irqdisable = MAILBOX_IRQENABLE(info->usr_id); - } - priv->intr_type = pdata->intr_type; + priv->irqenable = MAILBOX_IRQENABLE(intr_type, info->usr_id); + priv->irqstatus = MAILBOX_IRQSTATUS(intr_type, info->usr_id); + priv->irqdisable = MAILBOX_IRQDISABLE(intr_type, info->usr_id); + priv->intr_type = intr_type; mbox->priv = priv; mbox->name = info->name;