From patchwork Wed Jun 25 01:04:51 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Suman Anna X-Patchwork-Id: 4415631 Return-Path: X-Original-To: patchwork-linux-omap@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 6AC169F1D6 for ; Wed, 25 Jun 2014 01:06:31 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 4778720034 for ; Wed, 25 Jun 2014 01:06:30 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 1D63720120 for ; Wed, 25 Jun 2014 01:06:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754184AbaFYBGZ (ORCPT ); Tue, 24 Jun 2014 21:06:25 -0400 Received: from devils.ext.ti.com ([198.47.26.153]:55198 "EHLO devils.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752256AbaFYBGY (ORCPT ); Tue, 24 Jun 2014 21:06:24 -0400 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by devils.ext.ti.com (8.13.7/8.13.7) with ESMTP id s5P15uNI003912; Tue, 24 Jun 2014 20:05:56 -0500 Received: from DLEE71.ent.ti.com (dlee71.ent.ti.com [157.170.170.114]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id s5P15tRI016342; Tue, 24 Jun 2014 20:05:55 -0500 Received: from dlep32.itg.ti.com (157.170.170.100) by DLEE71.ent.ti.com (157.170.170.114) with Microsoft SMTP Server id 14.3.174.1; Tue, 24 Jun 2014 20:05:55 -0500 Received: from legion.dal.design.ti.com (legion.dal.design.ti.com [128.247.22.53]) by dlep32.itg.ti.com (8.14.3/8.13.8) with ESMTP id s5P15tm3007619; Tue, 24 Jun 2014 20:05:55 -0500 Received: from localhost (irmo.am.dhcp.ti.com [128.247.71.175]) by legion.dal.design.ti.com (8.11.7p1+Sun/8.11.7) with ESMTP id s5P15tt23077; Tue, 24 Jun 2014 20:05:55 -0500 (CDT) From: Suman Anna To: Tony Lindgren CC: Paul Walmsley , Dave Gerlach , Jassi Brar , , , , Suman Anna , Rajendra Nayak Subject: [PATCH 5/9] ARM: DRA7: hwmod_data: Add mailbox hwmod data Date: Tue, 24 Jun 2014 20:04:51 -0500 Message-ID: <1403658295-54766-6-git-send-email-s-anna@ti.com> X-Mailer: git-send-email 2.0.0 In-Reply-To: <1403658295-54766-1-git-send-email-s-anna@ti.com> References: <1403658295-54766-1-git-send-email-s-anna@ti.com> MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add the hwmod data for the 13 instances of the system mailbox IP in DRA7 SoC. The patch is needed for performing a soft-reset while configuring the respective mailbox instance, otherwise is a non-essential change for functionality. The modules are smart idled on reset, and the IP module mode is hardware controlled. Cc: Rajendra Nayak Cc: Paul Walmsley Signed-off-by: Suman Anna --- arch/arm/mach-omap2/omap_hwmod_7xx_data.c | 305 ++++++++++++++++++++++++++++++ 1 file changed, 305 insertions(+) diff --git a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c index 20b4398..e35f5b1 100644 --- a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c @@ -939,6 +939,194 @@ static struct omap_hwmod dra7xx_i2c5_hwmod = { }; /* + * 'mailbox' class + * + */ + +static struct omap_hwmod_class_sysconfig dra7xx_mailbox_sysc = { + .rev_offs = 0x0000, + .sysc_offs = 0x0010, + .sysc_flags = (SYSC_HAS_RESET_STATUS | SYSC_HAS_SIDLEMODE | + SYSC_HAS_SOFTRESET), + .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), + .sysc_fields = &omap_hwmod_sysc_type2, +}; + +static struct omap_hwmod_class dra7xx_mailbox_hwmod_class = { + .name = "mailbox", + .sysc = &dra7xx_mailbox_sysc, +}; + +/* mailbox1 */ +static struct omap_hwmod dra7xx_mailbox1_hwmod = { + .name = "mailbox1", + .class = &dra7xx_mailbox_hwmod_class, + .clkdm_name = "l4cfg_clkdm", + .prcm = { + .omap4 = { + .clkctrl_offs = DRA7XX_CM_L4CFG_MAILBOX1_CLKCTRL_OFFSET, + .context_offs = DRA7XX_RM_L4CFG_MAILBOX1_CONTEXT_OFFSET, + }, + }, +}; + +/* mailbox2 */ +static struct omap_hwmod dra7xx_mailbox2_hwmod = { + .name = "mailbox2", + .class = &dra7xx_mailbox_hwmod_class, + .clkdm_name = "l4cfg_clkdm", + .prcm = { + .omap4 = { + .clkctrl_offs = DRA7XX_CM_L4CFG_MAILBOX2_CLKCTRL_OFFSET, + .context_offs = DRA7XX_RM_L4CFG_MAILBOX2_CONTEXT_OFFSET, + }, + }, +}; + +/* mailbox3 */ +static struct omap_hwmod dra7xx_mailbox3_hwmod = { + .name = "mailbox3", + .class = &dra7xx_mailbox_hwmod_class, + .clkdm_name = "l4cfg_clkdm", + .prcm = { + .omap4 = { + .clkctrl_offs = DRA7XX_CM_L4CFG_MAILBOX3_CLKCTRL_OFFSET, + .context_offs = DRA7XX_RM_L4CFG_MAILBOX3_CONTEXT_OFFSET, + }, + }, +}; + +/* mailbox4 */ +static struct omap_hwmod dra7xx_mailbox4_hwmod = { + .name = "mailbox4", + .class = &dra7xx_mailbox_hwmod_class, + .clkdm_name = "l4cfg_clkdm", + .prcm = { + .omap4 = { + .clkctrl_offs = DRA7XX_CM_L4CFG_MAILBOX4_CLKCTRL_OFFSET, + .context_offs = DRA7XX_RM_L4CFG_MAILBOX4_CONTEXT_OFFSET, + }, + }, +}; + +/* mailbox5 */ +static struct omap_hwmod dra7xx_mailbox5_hwmod = { + .name = "mailbox5", + .class = &dra7xx_mailbox_hwmod_class, + .clkdm_name = "l4cfg_clkdm", + .prcm = { + .omap4 = { + .clkctrl_offs = DRA7XX_CM_L4CFG_MAILBOX5_CLKCTRL_OFFSET, + .context_offs = DRA7XX_RM_L4CFG_MAILBOX5_CONTEXT_OFFSET, + }, + }, +}; + +/* mailbox6 */ +static struct omap_hwmod dra7xx_mailbox6_hwmod = { + .name = "mailbox6", + .class = &dra7xx_mailbox_hwmod_class, + .clkdm_name = "l4cfg_clkdm", + .prcm = { + .omap4 = { + .clkctrl_offs = DRA7XX_CM_L4CFG_MAILBOX6_CLKCTRL_OFFSET, + .context_offs = DRA7XX_RM_L4CFG_MAILBOX6_CONTEXT_OFFSET, + }, + }, +}; + +/* mailbox7 */ +static struct omap_hwmod dra7xx_mailbox7_hwmod = { + .name = "mailbox7", + .class = &dra7xx_mailbox_hwmod_class, + .clkdm_name = "l4cfg_clkdm", + .prcm = { + .omap4 = { + .clkctrl_offs = DRA7XX_CM_L4CFG_MAILBOX7_CLKCTRL_OFFSET, + .context_offs = DRA7XX_RM_L4CFG_MAILBOX7_CONTEXT_OFFSET, + }, + }, +}; + +/* mailbox8 */ +static struct omap_hwmod dra7xx_mailbox8_hwmod = { + .name = "mailbox8", + .class = &dra7xx_mailbox_hwmod_class, + .clkdm_name = "l4cfg_clkdm", + .prcm = { + .omap4 = { + .clkctrl_offs = DRA7XX_CM_L4CFG_MAILBOX8_CLKCTRL_OFFSET, + .context_offs = DRA7XX_RM_L4CFG_MAILBOX8_CONTEXT_OFFSET, + }, + }, +}; + +/* mailbox9 */ +static struct omap_hwmod dra7xx_mailbox9_hwmod = { + .name = "mailbox9", + .class = &dra7xx_mailbox_hwmod_class, + .clkdm_name = "l4cfg_clkdm", + .prcm = { + .omap4 = { + .clkctrl_offs = DRA7XX_CM_L4CFG_MAILBOX9_CLKCTRL_OFFSET, + .context_offs = DRA7XX_RM_L4CFG_MAILBOX9_CONTEXT_OFFSET, + }, + }, +}; + +/* mailbox10 */ +static struct omap_hwmod dra7xx_mailbox10_hwmod = { + .name = "mailbox10", + .class = &dra7xx_mailbox_hwmod_class, + .clkdm_name = "l4cfg_clkdm", + .prcm = { + .omap4 = { + .clkctrl_offs = DRA7XX_CM_L4CFG_MAILBOX10_CLKCTRL_OFFSET, + .context_offs = DRA7XX_RM_L4CFG_MAILBOX10_CONTEXT_OFFSET, + }, + }, +}; + +/* mailbox11 */ +static struct omap_hwmod dra7xx_mailbox11_hwmod = { + .name = "mailbox11", + .class = &dra7xx_mailbox_hwmod_class, + .clkdm_name = "l4cfg_clkdm", + .prcm = { + .omap4 = { + .clkctrl_offs = DRA7XX_CM_L4CFG_MAILBOX11_CLKCTRL_OFFSET, + .context_offs = DRA7XX_RM_L4CFG_MAILBOX11_CONTEXT_OFFSET, + }, + }, +}; + +/* mailbox12 */ +static struct omap_hwmod dra7xx_mailbox12_hwmod = { + .name = "mailbox12", + .class = &dra7xx_mailbox_hwmod_class, + .clkdm_name = "l4cfg_clkdm", + .prcm = { + .omap4 = { + .clkctrl_offs = DRA7XX_CM_L4CFG_MAILBOX12_CLKCTRL_OFFSET, + .context_offs = DRA7XX_RM_L4CFG_MAILBOX12_CONTEXT_OFFSET, + }, + }, +}; + +/* mailbox13 */ +static struct omap_hwmod dra7xx_mailbox13_hwmod = { + .name = "mailbox13", + .class = &dra7xx_mailbox_hwmod_class, + .clkdm_name = "l4cfg_clkdm", + .prcm = { + .omap4 = { + .clkctrl_offs = DRA7XX_CM_L4CFG_MAILBOX13_CLKCTRL_OFFSET, + .context_offs = DRA7XX_RM_L4CFG_MAILBOX13_CONTEXT_OFFSET, + }, + }, +}; + +/* * 'mcspi' class * */ @@ -2246,6 +2434,110 @@ static struct omap_hwmod_ocp_if dra7xx_l4_per1__i2c5 = { .user = OCP_USER_MPU | OCP_USER_SDMA, }; +/* l4_cfg -> mailbox1 */ +static struct omap_hwmod_ocp_if dra7xx_l4_cfg__mailbox1 = { + .master = &dra7xx_l4_cfg_hwmod, + .slave = &dra7xx_mailbox1_hwmod, + .clk = "l3_iclk_div", + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +/* l4_per3 -> mailbox2 */ +static struct omap_hwmod_ocp_if dra7xx_l4_per3__mailbox2 = { + .master = &dra7xx_l4_per3_hwmod, + .slave = &dra7xx_mailbox2_hwmod, + .clk = "l3_iclk_div", + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +/* l4_per3 -> mailbox3 */ +static struct omap_hwmod_ocp_if dra7xx_l4_per3__mailbox3 = { + .master = &dra7xx_l4_per3_hwmod, + .slave = &dra7xx_mailbox3_hwmod, + .clk = "l3_iclk_div", + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +/* l4_per3 -> mailbox4 */ +static struct omap_hwmod_ocp_if dra7xx_l4_per3__mailbox4 = { + .master = &dra7xx_l4_per3_hwmod, + .slave = &dra7xx_mailbox4_hwmod, + .clk = "l3_iclk_div", + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +/* l4_per3 -> mailbox5 */ +static struct omap_hwmod_ocp_if dra7xx_l4_per3__mailbox5 = { + .master = &dra7xx_l4_per3_hwmod, + .slave = &dra7xx_mailbox5_hwmod, + .clk = "l3_iclk_div", + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +/* l4_per3 -> mailbox6 */ +static struct omap_hwmod_ocp_if dra7xx_l4_per3__mailbox6 = { + .master = &dra7xx_l4_per3_hwmod, + .slave = &dra7xx_mailbox6_hwmod, + .clk = "l3_iclk_div", + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +/* l4_per3 -> mailbox7 */ +static struct omap_hwmod_ocp_if dra7xx_l4_per3__mailbox7 = { + .master = &dra7xx_l4_per3_hwmod, + .slave = &dra7xx_mailbox7_hwmod, + .clk = "l3_iclk_div", + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +/* l4_per3 -> mailbox8 */ +static struct omap_hwmod_ocp_if dra7xx_l4_per3__mailbox8 = { + .master = &dra7xx_l4_per3_hwmod, + .slave = &dra7xx_mailbox8_hwmod, + .clk = "l3_iclk_div", + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +/* l4_per3 -> mailbox9 */ +static struct omap_hwmod_ocp_if dra7xx_l4_per3__mailbox9 = { + .master = &dra7xx_l4_per3_hwmod, + .slave = &dra7xx_mailbox9_hwmod, + .clk = "l3_iclk_div", + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +/* l4_per3 -> mailbox10 */ +static struct omap_hwmod_ocp_if dra7xx_l4_per3__mailbox10 = { + .master = &dra7xx_l4_per3_hwmod, + .slave = &dra7xx_mailbox10_hwmod, + .clk = "l3_iclk_div", + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +/* l4_per3 -> mailbox11 */ +static struct omap_hwmod_ocp_if dra7xx_l4_per3__mailbox11 = { + .master = &dra7xx_l4_per3_hwmod, + .slave = &dra7xx_mailbox11_hwmod, + .clk = "l3_iclk_div", + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +/* l4_per3 -> mailbox12 */ +static struct omap_hwmod_ocp_if dra7xx_l4_per3__mailbox12 = { + .master = &dra7xx_l4_per3_hwmod, + .slave = &dra7xx_mailbox12_hwmod, + .clk = "l3_iclk_div", + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +/* l4_per3 -> mailbox13 */ +static struct omap_hwmod_ocp_if dra7xx_l4_per3__mailbox13 = { + .master = &dra7xx_l4_per3_hwmod, + .slave = &dra7xx_mailbox13_hwmod, + .clk = "l3_iclk_div", + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + /* l4_per1 -> mcspi1 */ static struct omap_hwmod_ocp_if dra7xx_l4_per1__mcspi1 = { .master = &dra7xx_l4_per1_hwmod, @@ -2662,6 +2954,19 @@ static struct omap_hwmod_ocp_if *dra7xx_hwmod_ocp_ifs[] __initdata = { &dra7xx_l4_per1__i2c3, &dra7xx_l4_per1__i2c4, &dra7xx_l4_per1__i2c5, + &dra7xx_l4_cfg__mailbox1, + &dra7xx_l4_per3__mailbox2, + &dra7xx_l4_per3__mailbox3, + &dra7xx_l4_per3__mailbox4, + &dra7xx_l4_per3__mailbox5, + &dra7xx_l4_per3__mailbox6, + &dra7xx_l4_per3__mailbox7, + &dra7xx_l4_per3__mailbox8, + &dra7xx_l4_per3__mailbox9, + &dra7xx_l4_per3__mailbox10, + &dra7xx_l4_per3__mailbox11, + &dra7xx_l4_per3__mailbox12, + &dra7xx_l4_per3__mailbox13, &dra7xx_l4_per1__mcspi1, &dra7xx_l4_per1__mcspi2, &dra7xx_l4_per1__mcspi3,