From patchwork Fri Aug 22 13:49:28 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nishanth Menon X-Patchwork-Id: 4763991 Return-Path: X-Original-To: patchwork-linux-omap@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 9C6529F37E for ; Fri, 22 Aug 2014 13:51:27 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id CBFD920136 for ; Fri, 22 Aug 2014 13:51:26 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id EB52920108 for ; Fri, 22 Aug 2014 13:51:25 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756574AbaHVNvG (ORCPT ); Fri, 22 Aug 2014 09:51:06 -0400 Received: from bear.ext.ti.com ([192.94.94.41]:33333 "EHLO bear.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756459AbaHVNuT (ORCPT ); Fri, 22 Aug 2014 09:50:19 -0400 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by bear.ext.ti.com (8.13.7/8.13.7) with ESMTP id s7MDnqkt000626; Fri, 22 Aug 2014 08:49:52 -0500 Received: from DLEE71.ent.ti.com (dlee71.ent.ti.com [157.170.170.114]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id s7MDnpQ2006154; Fri, 22 Aug 2014 08:49:52 -0500 Received: from dflp33.itg.ti.com (10.64.6.16) by DLEE71.ent.ti.com (157.170.170.114) with Microsoft SMTP Server id 14.3.174.1; Fri, 22 Aug 2014 08:49:51 -0500 Received: from localhost (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp33.itg.ti.com (8.14.3/8.13.8) with ESMTP id s7MDnpVV011904; Fri, 22 Aug 2014 08:49:51 -0500 From: Nishanth Menon To: Tony Lindgren CC: Kevin Hilman , Tero Kristo , Paul Walmsley , , , , Keerthy , =?UTF-8?q?Beno=C3=AEt=20Cousson?= , Santosh Shilimkar , Nishanth Menon Subject: [PATCH 2/7] ARM: OMAP5: powerdomain data: fix powerdomain powerstate Date: Fri, 22 Aug 2014 08:49:28 -0500 Message-ID: <1408715373-25791-3-git-send-email-nm@ti.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1408715373-25791-1-git-send-email-nm@ti.com> References: <1408715373-25791-1-git-send-email-nm@ti.com> MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Spam-Status: No, score=-7.6 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Update the power domain power states for final production chip capability. OFF mode, OSWR etc have been descoped for various domains. Signed-off-by: Nishanth Menon --- arch/arm/mach-omap2/powerdomains54xx_data.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/arch/arm/mach-omap2/powerdomains54xx_data.c b/arch/arm/mach-omap2/powerdomains54xx_data.c index ce1d752..60d7ed8 100644 --- a/arch/arm/mach-omap2/powerdomains54xx_data.c +++ b/arch/arm/mach-omap2/powerdomains54xx_data.c @@ -35,7 +35,7 @@ static struct powerdomain core_54xx_pwrdm = { .prcm_offs = OMAP54XX_PRM_CORE_INST, .prcm_partition = OMAP54XX_PRM_PARTITION, .pwrsts = PWRSTS_RET_ON, - .pwrsts_logic_ret = PWRSTS_OFF_RET, + .pwrsts_logic_ret = PWRSTS_RET, .banks = 5, .pwrsts_mem_ret = { [0] = PWRSTS_OFF_RET, /* core_nret_bank */ @@ -107,8 +107,8 @@ static struct powerdomain cpu0_54xx_pwrdm = { .voltdm = { .name = "mpu" }, .prcm_offs = OMAP54XX_PRCM_MPU_PRM_C0_INST, .prcm_partition = OMAP54XX_PRCM_MPU_PARTITION, - .pwrsts = PWRSTS_OFF_RET_ON, - .pwrsts_logic_ret = PWRSTS_OFF_RET, + .pwrsts = PWRSTS_RET_ON, + .pwrsts_logic_ret = PWRSTS_RET, .banks = 1, .pwrsts_mem_ret = { [0] = PWRSTS_OFF_RET, /* cpu0_l1 */ @@ -124,8 +124,8 @@ static struct powerdomain cpu1_54xx_pwrdm = { .voltdm = { .name = "mpu" }, .prcm_offs = OMAP54XX_PRCM_MPU_PRM_C1_INST, .prcm_partition = OMAP54XX_PRCM_MPU_PARTITION, - .pwrsts = PWRSTS_OFF_RET_ON, - .pwrsts_logic_ret = PWRSTS_OFF_RET, + .pwrsts = PWRSTS_RET_ON, + .pwrsts_logic_ret = PWRSTS_RET, .banks = 1, .pwrsts_mem_ret = { [0] = PWRSTS_OFF_RET, /* cpu1_l1 */ @@ -158,7 +158,7 @@ static struct powerdomain mpu_54xx_pwrdm = { .prcm_offs = OMAP54XX_PRM_MPU_INST, .prcm_partition = OMAP54XX_PRM_PARTITION, .pwrsts = PWRSTS_RET_ON, - .pwrsts_logic_ret = PWRSTS_OFF_RET, + .pwrsts_logic_ret = PWRSTS_RET, .banks = 2, .pwrsts_mem_ret = { [0] = PWRSTS_OFF_RET, /* mpu_l2 */