From patchwork Thu Aug 28 08:01:56 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vivek Gautam X-Patchwork-Id: 4797041 Return-Path: X-Original-To: patchwork-linux-omap@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id E7679C0338 for ; Thu, 28 Aug 2014 08:04:39 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id C5EF6201B9 for ; Thu, 28 Aug 2014 08:04:38 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id BB7782017E for ; Thu, 28 Aug 2014 08:04:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S936324AbaH1ICf (ORCPT ); Thu, 28 Aug 2014 04:02:35 -0400 Received: from mail-pa0-f54.google.com ([209.85.220.54]:51759 "EHLO mail-pa0-f54.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S936282AbaH1ICb (ORCPT ); Thu, 28 Aug 2014 04:02:31 -0400 Received: by mail-pa0-f54.google.com with SMTP id fb1so1546729pad.13 for ; Thu, 28 Aug 2014 01:02:28 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=hxsS3dcIZwswxkkmlqVcLrd+QLV2qpldoB40rXtgMS4=; b=eJYKPxlYlHD+xoL6YEqft3bbLoJ8g7yJKDlyeLQ2WxqDkOiRq95HexNt7n/Uupgd6W E3b6VQ5Hxls9JfWx/FFPVN93hA7c1EnRDPb3Hqyhn3McLFIlbq6ksWwWIEvn+5P2VTqG 0mHlrKUg1VRi8uZ1y7ekQw/EDuQec2emwKF6EEQgA8BJ7r1MG8oyycD8Z1jNrIebZgkc 642pPM+iEA5RQCZHCiIDbDh84W6iFESLmw8fv3CEh6tK48BdoAotdn/wJWnO70/NiGTk lIFGK95c8vLAz2/ctHTqlOsXGrAU6/owWFXyP4pPbntHHVgdpYqAGNBGpGd/WaG36DQI wvqg== X-Received: by 10.70.90.198 with SMTP id by6mr3277033pdb.164.1409212947620; Thu, 28 Aug 2014 01:02:27 -0700 (PDT) Received: from vivek-linuxpc.sisodomain.com ([14.140.216.146]) by mx.google.com with ESMTPSA id ty8sm10076836pab.26.2014.08.28.01.02.23 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Thu, 28 Aug 2014 01:02:27 -0700 (PDT) From: Vivek Gautam To: linux-usb@vger.kernel.org Cc: devicetree@vger.kernel.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-omap@vger.kernel.org, gregkh@linuxfoundation.org, balbi@ti.com, kishon@ti.com, kgene.kim@samsung.com, Vivek Gautam Subject: [PATCH 1/5] usb: dwc3: exynos: Add support for SCLK present on Exynos7 Date: Thu, 28 Aug 2014 13:31:56 +0530 Message-Id: <1409212920-28526-2-git-send-email-gautam.vivek@samsung.com> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1409212920-28526-1-git-send-email-gautam.vivek@samsung.com> References: <1409212920-28526-1-git-send-email-gautam.vivek@samsung.com> Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Spam-Status: No, score=-6.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,RP_MATCHES_RCVD,T_DKIM_INVALID,UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Exynos7 also has a separate special gate clock going to the IP apart from the usual AHB clock. So add support for the same. Signed-off-by: Vivek Gautam --- drivers/usb/dwc3/dwc3-exynos.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/drivers/usb/dwc3/dwc3-exynos.c b/drivers/usb/dwc3/dwc3-exynos.c index f9fb8ad..bab6395 100644 --- a/drivers/usb/dwc3/dwc3-exynos.c +++ b/drivers/usb/dwc3/dwc3-exynos.c @@ -35,6 +35,7 @@ struct dwc3_exynos { struct device *dev; struct clk *clk; + struct clk *sclk; struct regulator *vdd33; struct regulator *vdd10; }; @@ -141,10 +142,17 @@ static int dwc3_exynos_probe(struct platform_device *pdev) return -EINVAL; } + /* Exynos7 has a special gate clock going to this IP */ + exynos->sclk = devm_clk_get(dev, "usbdrd30_sclk"); + if (IS_ERR(exynos->sclk)) + dev_warn(dev, "couldn't get sclk\n"); + exynos->dev = dev; exynos->clk = clk; clk_prepare_enable(exynos->clk); + if (!IS_ERR(exynos->sclk)) + clk_prepare_enable(exynos->sclk); exynos->vdd33 = devm_regulator_get(dev, "vdd33"); if (IS_ERR(exynos->vdd33)) { @@ -187,6 +195,8 @@ err4: err3: regulator_disable(exynos->vdd33); err2: + if (!IS_ERR(exynos->sclk)) + clk_disable_unprepare(exynos->sclk); clk_disable_unprepare(clk); return ret; } @@ -199,6 +209,8 @@ static int dwc3_exynos_remove(struct platform_device *pdev) platform_device_unregister(exynos->usb2_phy); platform_device_unregister(exynos->usb3_phy); + if (!IS_ERR(exynos->sclk)) + clk_disable_unprepare(exynos->sclk); clk_disable_unprepare(exynos->clk); regulator_disable(exynos->vdd33); @@ -220,6 +232,8 @@ static int dwc3_exynos_suspend(struct device *dev) { struct dwc3_exynos *exynos = dev_get_drvdata(dev); + if (!IS_ERR(exynos->sclk)) + clk_disable(exynos->sclk); clk_disable(exynos->clk); regulator_disable(exynos->vdd33); @@ -245,6 +259,8 @@ static int dwc3_exynos_resume(struct device *dev) } clk_enable(exynos->clk); + if (!IS_ERR(exynos->sclk)) + clk_enable(exynos->sclk); /* runtime set active to reflect active state. */ pm_runtime_disable(dev);