From patchwork Fri Sep 5 19:02:49 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sebastian Andrzej Siewior X-Patchwork-Id: 4854421 Return-Path: X-Original-To: patchwork-linux-omap@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 0C0759F32F for ; Fri, 5 Sep 2014 19:28:53 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 3CE21201D3 for ; Fri, 5 Sep 2014 19:28:52 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 5CF172012F for ; Fri, 5 Sep 2014 19:28:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751667AbaIET2h (ORCPT ); Fri, 5 Sep 2014 15:28:37 -0400 Received: from www.linutronix.de ([62.245.132.108]:33962 "EHLO Galois.linutronix.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751144AbaIET2f (ORCPT ); Fri, 5 Sep 2014 15:28:35 -0400 Received: from localhost ([127.0.0.1] helo=bazinga.breakpoint.cc) by Galois.linutronix.de with esmtp (Exim 4.80) (envelope-from ) id 1XPymw-0002uU-Su; Fri, 05 Sep 2014 21:03:15 +0200 From: Sebastian Andrzej Siewior To: linux-serial@vger.kernel.org Cc: linux-kernel@vger.kernel.org, linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org, tony@atomide.com, balbi@ti.com, Greg Kroah-Hartman , Sebastian Andrzej Siewior Subject: [PATCH 14/18] tty: serial: 8250_dma: handle the when UART response while DMA remains idle Date: Fri, 5 Sep 2014 21:02:49 +0200 Message-Id: <1409943773-7874-15-git-send-email-bigeasy@linutronix.de> X-Mailer: git-send-email 2.1.0 In-Reply-To: <1409943773-7874-1-git-send-email-bigeasy@linutronix.de> References: <1409943773-7874-1-git-send-email-bigeasy@linutronix.de> X-Linutronix-Spam-Score: -1.0 X-Linutronix-Spam-Level: - X-Linutronix-Spam-Status: No , -1.0 points, 5.0 required, ALL_TRUSTED=-1, SHORTCIRCUIT=-0.0001 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Spam-Status: No, score=-8.6 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Sometimes the OMAP UART does not signal the DMA engine to unload the FIFO. Usually this happens when we have >threshold bytes in the FIFO and start the DMA transfer. It seems that in those cases the UART won't trigger the transfer once the requested threshold is reached. In some rare cases the UART does not trigger the DMA transfer even if programmed while the FIFO was empty. In those cases the UART drops an RDI event and we have to empty the FIFO manually. If we ignore it because the DMA transfer is programmed then we will enter the function a few times until we receive the RX_TIMEOUT event. At that point the FIFO is usually full and we risk to overflow the FIFO. Signed-off-by: Sebastian Andrzej Siewior --- drivers/tty/serial/8250/8250_dma.c | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/drivers/tty/serial/8250/8250_dma.c b/drivers/tty/serial/8250/8250_dma.c index 6cd8a4db609a..f0fce8236279 100644 --- a/drivers/tty/serial/8250/8250_dma.c +++ b/drivers/tty/serial/8250/8250_dma.c @@ -182,6 +182,24 @@ int serial8250_rx_dma(struct uart_8250_port *p, unsigned int iir) __dma_rx_do_complete(p, true); } return -ETIMEDOUT; + case UART_IIR_RDI: + if (p->bugs & UART_BUG_DMA_RX) + break; + /* + * The OMAP UART is a special BEAST. If we receive RDI we _have_ + * a DMA transfer programmed but it didn't worked. One reason is + * that we were too slow and there were too many bytes in the + * FIFO, the UART counted wrong and never kicked the DMA engine + * to do anything. That means once we receive RDI on OMAP than + * the DMA won't do anything soon so we have to cancel the DMA + * transfer and purge the FIFO manually. + */ + if (dma->rx_running) { + dmaengine_pause(dma->rxchan); + __dma_rx_do_complete(p, true); + } + return -ETIMEDOUT; + default: break; }