From patchwork Thu Sep 11 15:02:08 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ezequiel Garcia X-Patchwork-Id: 4888841 Return-Path: X-Original-To: patchwork-linux-omap@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id C70A49F32F for ; Thu, 11 Sep 2014 15:04:31 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 2C0C420256 for ; Thu, 11 Sep 2014 15:04:27 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id D056820251 for ; Thu, 11 Sep 2014 15:04:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752709AbaIKPEX (ORCPT ); Thu, 11 Sep 2014 11:04:23 -0400 Received: from mail-qg0-f47.google.com ([209.85.192.47]:59751 "EHLO mail-qg0-f47.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751778AbaIKPEX (ORCPT ); Thu, 11 Sep 2014 11:04:23 -0400 Received: by mail-qg0-f47.google.com with SMTP id i50so6468037qgf.20 for ; Thu, 11 Sep 2014 08:04:19 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=02DUo/gWsUGQ5CnTFvFaTumx+6Ir0UlKTMzS1475Mbc=; b=EWk+yPJpx+zJz3CVqGYiXNuTY4CY5h1V8nlZ8xK3n7/3AGdbrca5sJIgkQkt41PLE6 rCm19+xAZUQNURlOrpVz+fN2q26EaCsxzUCGwgIEwWv2YzqzD73Acf/mUa5vrXkGxlky 0oX7FjMShWKxQn9gXQ/jS0wzXlgQUNDlBIZ1Vj/6ezMnfMwEpNGzgDnV5EAS6bAqbiWu Ro8XT2mAPgjQjCjwXB8VJxCWcbbvwSY83bU04bz8O6Osgp7ICRnkFkGkG9NIxCIsAzB+ nLt4avRXo4Wc2UCf9mS34LXf/RJdi/+V4LdEa4NEXrj8dQ0NldMiEc09oUV/uyfP5GUN TjGw== X-Gm-Message-State: ALoCoQnrOgd6feLWGtnGxfswNL6rrL8y5fJzHWO5slGNHreTCVBs/2iYQe4bgG4DJjd+JGjgrk8b X-Received: by 10.229.242.65 with SMTP id lh1mr2468250qcb.18.1410447859192; Thu, 11 Sep 2014 08:04:19 -0700 (PDT) Received: from localhost.localdomain (host195.181-8-55.telecom.net.ar. [181.8.55.195]) by mx.google.com with ESMTPSA id s102sm774413qgd.44.2014.09.11.08.04.15 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 11 Sep 2014 08:04:18 -0700 (PDT) From: Ezequiel Garcia To: Roger Quadros , Brian Norris Cc: Tony Lindgren , , , Ezequiel Garcia Subject: [PATCH v3 1/3] nand: omap2: Add support for flash-based bad block table Date: Thu, 11 Sep 2014 12:02:08 -0300 Message-Id: <1410447730-16087-2-git-send-email-ezequiel@vanguardiasur.com.ar> X-Mailer: git-send-email 2.1.0 In-Reply-To: <1410447730-16087-1-git-send-email-ezequiel@vanguardiasur.com.ar> References: <1410447730-16087-1-git-send-email-ezequiel@vanguardiasur.com.ar> Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Spam-Status: No, score=-9.4 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This commit adds a new platform-data boolean property that enables use of a flash-based bad block table. This can also be enabled by setting the 'nand-on-flash-bbt' devicetree property. If the flash BBT is not enabled, the driver falls back to use OOB bad block markers only, as before. If the flash BBT is enabled the kernel will keep track of bad blocks using a BBT, in addition to the OOB markers. As explained by Brian Norris the reasons for using a BBT are: "" The primary reason would be that NAND datasheets specify it these days. A better argument is that nobody guarantees that you can write a bad block marker to a worn out block; you may just get program failures. This has been acknowledged by several developers over the last several years. Additionally, you get a boot-time performance improvement if you only have to read a few pages, instead of a page or two from every block on the flash. "" Signed-off-by: Ezequiel Garcia Acked-by: Roger Quadros --- arch/arm/mach-omap2/gpmc.c | 2 ++ drivers/mtd/nand/omap2.c | 6 +++++- include/linux/platform_data/mtd-nand-omap2.h | 1 + 3 files changed, 8 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c index 2f97228..b55a225 100644 --- a/arch/arm/mach-omap2/gpmc.c +++ b/arch/arm/mach-omap2/gpmc.c @@ -1440,6 +1440,8 @@ static int gpmc_probe_nand_child(struct platform_device *pdev, break; } + gpmc_nand_data->flash_bbt = of_get_nand_on_flash_bbt(child); + val = of_get_nand_bus_width(child); if (val == 16) gpmc_nand_data->devsize = NAND_BUSWIDTH_16; diff --git a/drivers/mtd/nand/omap2.c b/drivers/mtd/nand/omap2.c index 5967b38..e1a9b31 100644 --- a/drivers/mtd/nand/omap2.c +++ b/drivers/mtd/nand/omap2.c @@ -1663,7 +1663,6 @@ static int omap_nand_probe(struct platform_device *pdev) mtd->owner = THIS_MODULE; nand_chip = &info->nand; nand_chip->ecc.priv = NULL; - nand_chip->options |= NAND_SKIP_BBTSCAN; res = platform_get_resource(pdev, IORESOURCE_MEM, 0); nand_chip->IO_ADDR_R = devm_ioremap_resource(&pdev->dev, res); @@ -1692,6 +1691,11 @@ static int omap_nand_probe(struct platform_device *pdev) nand_chip->chip_delay = 50; } + if (pdata->flash_bbt) + nand_chip->bbt_options |= NAND_BBT_USE_FLASH | NAND_BBT_NO_OOB; + else + nand_chip->options |= NAND_SKIP_BBTSCAN; + /* scan NAND device connected to chip controller */ nand_chip->options |= pdata->devsize & NAND_BUSWIDTH_16; if (nand_scan_ident(mtd, 1, NULL)) { diff --git a/include/linux/platform_data/mtd-nand-omap2.h b/include/linux/platform_data/mtd-nand-omap2.h index 16ec262..090bbab 100644 --- a/include/linux/platform_data/mtd-nand-omap2.h +++ b/include/linux/platform_data/mtd-nand-omap2.h @@ -71,6 +71,7 @@ struct omap_nand_platform_data { struct mtd_partition *parts; int nr_parts; bool dev_ready; + bool flash_bbt; enum nand_io xfer_type; int devsize; enum omap_ecc ecc_opt;