From patchwork Wed Sep 17 12:10:05 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Lifshitz X-Patchwork-Id: 4923951 Return-Path: X-Original-To: patchwork-linux-omap@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 339009F2EC for ; Wed, 17 Sep 2014 12:09:13 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id C913120109 for ; Wed, 17 Sep 2014 12:10:36 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 15BA42017D for ; Wed, 17 Sep 2014 12:10:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755389AbaIQMK3 (ORCPT ); Wed, 17 Sep 2014 08:10:29 -0400 Received: from softlayer.compulab.co.il ([50.23.254.55]:53335 "EHLO compulab.co.il" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754634AbaIQMKT (ORCPT ); Wed, 17 Sep 2014 08:10:19 -0400 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=compulab.co.il; s=default; h=References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From; bh=vKkxvAP7qzxoQ/z7JS9/QBLMmL3shFl6WjT3SW0aCFE=; b=Kw8TizgUGP3/QkVetUKC+KG/xcxMPgimRzNPiy2u5BjB1bmWGw3M/hJ25G+VdUg3fh3Mmm7ZX+g56mhd0YAKKa8HBLTz+mxIJemUlQIBSv6QjHqREMK1hE7fbJTG+w+8ZSN8fibMP2u2L0W4mCgr6uQ4ddTblXkf2Ti9cF3vpio=; Received: from [62.90.235.247] (port=48905 helo=zimbra-mta.compulab.co.il) by softlayer.compulab.co.il with esmtp (Exim 4.82) (envelope-from ) id 1XUE3u-0000kI-R5; Wed, 17 Sep 2014 15:10:19 +0300 Received: from localhost (localhost [127.0.0.1]) by zimbra-mta.compulab.co.il (Postfix) with ESMTP id BFFF5483EAB; Wed, 17 Sep 2014 15:10:17 +0300 (IDT) Received: from zimbra-mta.compulab.co.il ([127.0.0.1]) by localhost (zimbra-mta.compulab.co.il [127.0.0.1]) (amavisd-new, port 10032) with ESMTP id YpCGGTREmg8v; Wed, 17 Sep 2014 15:10:16 +0300 (IDT) Received: from localhost (localhost [127.0.0.1]) by zimbra-mta.compulab.co.il (Postfix) with ESMTP id 2DAB2483EAE; Wed, 17 Sep 2014 15:10:16 +0300 (IDT) X-Virus-Scanned: amavisd-new at zimbra-mta.compulab.co.il Received: from zimbra-mta.compulab.co.il ([127.0.0.1]) by localhost (zimbra-mta.compulab.co.il [127.0.0.1]) (amavisd-new, port 10026) with ESMTP id eKASY3ThFEeX; Wed, 17 Sep 2014 15:10:16 +0300 (IDT) Received: from localhost.localdomain (lifshitz-linux.compulab.local [192.168.11.10]) by zimbra-mta.compulab.co.il (Postfix) with ESMTPSA id 05D63483EAD; Wed, 17 Sep 2014 15:10:16 +0300 (IDT) From: Dmitry Lifshitz To: =?UTF-8?q?Beno=C3=AEt=20Cousson?= , Tony Lindgren , linux-omap@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: Dmitry Lifshitz Subject: [PATCH v2 3/6] ARM: dts: cm-t54: add HDMI/DVI display data Date: Wed, 17 Sep 2014 15:10:05 +0300 Message-Id: <1410955808-2174-4-git-send-email-lifshitz@compulab.co.il> X-Mailer: git-send-email 1.7.5.4 In-Reply-To: <1410955808-2174-1-git-send-email-lifshitz@compulab.co.il> References: <1410885322-5928-1-git-send-email-lifshitz@compulab.co.il> <1410955808-2174-1-git-send-email-lifshitz@compulab.co.il> X-AntiAbuse: This header was added to track abuse, please include it with any abuse report X-AntiAbuse: Primary Hostname - softlayer.compulab.co.il X-AntiAbuse: Original Domain - vger.kernel.org X-AntiAbuse: Originator/Caller UID/GID - [47 12] / [47 12] X-AntiAbuse: Sender Address Domain - compulab.co.il X-Get-Message-Sender-Via: softlayer.compulab.co.il: acl_c_relayhosts_text_entry: lifshitz@compulab.co.il|compulab.co.il Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Spam-Status: No, score=-7.4 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,RP_MATCHES_RCVD,T_DKIM_INVALID,UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add DSS related pinmux and display data nodes required to support HDMI and DVI video out on CM-T54. Signed-off-by: Dmitry Lifshitz --- v2: * Fixed comment style issue for mux mode. Follow the convention mode0_name.modeX_name for pins which mux mode differs from MUX_MODE0 * Moved aliases node to the top of dts file arch/arm/boot/dts/omap5-cm-t54.dts | 158 ++++++++++++++++++++++++++++++++++++ 1 files changed, 158 insertions(+), 0 deletions(-) diff --git a/arch/arm/boot/dts/omap5-cm-t54.dts b/arch/arm/boot/dts/omap5-cm-t54.dts index 44a9f23..d2f241d 100644 --- a/arch/arm/boot/dts/omap5-cm-t54.dts +++ b/arch/arm/boot/dts/omap5-cm-t54.dts @@ -16,6 +16,11 @@ reg = <0x80000000 0x7F000000>; /* 2048 MB */ }; + aliases { + display0 = &hdmi0; + display1 = &dvi0; + }; + vmmcsd_fixed: fixed-regulator-mmcsd { compatible = "regulator-fixed"; regulator-name = "vmmcsd_fixed"; @@ -66,6 +71,64 @@ default-state = "off"; }; }; + + hdmi0: connector@0 { + compatible = "hdmi-connector"; + label = "hdmi"; + + type = "a"; + + pinctrl-names = "default"; + pinctrl-0 = <&hdmi_conn_pins>; + + hpd-gpios = <&gpio7 1 GPIO_ACTIVE_HIGH>; /* GPIO 193, HPD */ + + port { + hdmi_connector_in: endpoint { + remote-endpoint = <&hdmi_out>; + }; + }; + }; + + tfp410: encoder@0 { + compatible = "ti,tfp410"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + tfp410_in: endpoint@0 { + remote-endpoint = <&dpi_dvi_out>; + }; + }; + + port@1 { + reg = <1>; + + tfp410_out: endpoint@0 { + remote-endpoint = <&dvi_connector_in>; + }; + }; + }; + }; + + dvi0: connector@1 { + compatible = "dvi-connector"; + label = "dvi"; + + digital; + + ddc-i2c-bus = <&i2c2>; + + port { + dvi_connector_in: endpoint { + remote-endpoint = <&tfp410_out>; + }; + }; + }; }; &omap5_pmx_core { @@ -88,6 +151,13 @@ >; }; + i2c2_pins: pinmux_i2c2_pins { + pinctrl-single,pins = < + OMAP5_IOPAD(0x01b8, PIN_INPUT | MUX_MODE0) /* i2c2_scl */ + OMAP5_IOPAD(0x01ba, PIN_INPUT | MUX_MODE0) /* i2c2_sda */ + >; + }; + mmc1_pins: pinmux_mmc1_pins { pinctrl-single,pins = < OMAP5_IOPAD(0x01e2, PIN_INPUT_PULLUP | MUX_MODE0) /* sdcard_clk */ @@ -144,6 +214,53 @@ OMAP5_IOPAD(0x00b6, PIN_OUTPUT | MUX_MODE6) /* hsi2_acdata.gpio3_83 */ >; }; + + dss_hdmi_pins: pinmux_dss_hdmi_pins { + pinctrl-single,pins = < + OMAP5_IOPAD(0x013c, PIN_INPUT_PULLUP | MUX_MODE0) /* hdmi_cec */ + OMAP5_IOPAD(0x0140, PIN_INPUT | MUX_MODE0) /* hdmi_ddc_scl */ + OMAP5_IOPAD(0x0142, PIN_INPUT | MUX_MODE0) /* hdmi_ddc_sda */ + >; + }; + + hdmi_conn_pins: pinmux_hdmi_conn_pins { + pinctrl-single,pins = < + OMAP5_IOPAD(0x013e, PIN_INPUT | MUX_MODE6) /* hdmi_hpd.gpio7_193 */ + >; + }; + + dss_dpi_pins: pinmux_dss_dpi_pins { + pinctrl-single,pins = < + OMAP5_IOPAD(0x0104, PIN_OUTPUT | MUX_MODE3) /* rfbi_data15.dispc_data15 */ + OMAP5_IOPAD(0x0106, PIN_OUTPUT | MUX_MODE3) /* rfbi_data14.dispc_data14 */ + OMAP5_IOPAD(0x0108, PIN_OUTPUT | MUX_MODE3) /* rfbi_data13.dispc_data13 */ + OMAP5_IOPAD(0x010a, PIN_OUTPUT | MUX_MODE3) /* rfbi_data12.dispc_data12 */ + OMAP5_IOPAD(0x010c, PIN_OUTPUT | MUX_MODE3) /* rfbi_data11.dispc_data11 */ + OMAP5_IOPAD(0x010e, PIN_OUTPUT | MUX_MODE3) /* rfbi_data10.dispc_data10 */ + OMAP5_IOPAD(0x0110, PIN_OUTPUT | MUX_MODE3) /* rfbi_data9.dispc_data9 */ + OMAP5_IOPAD(0x0112, PIN_OUTPUT | MUX_MODE3) /* rfbi_data8.dispc_data8 */ + OMAP5_IOPAD(0x0114, PIN_OUTPUT | MUX_MODE3) /* rfbi_data7.dispc_data7 */ + OMAP5_IOPAD(0x0116, PIN_OUTPUT | MUX_MODE3) /* rfbi_data6.dispc_data6 */ + OMAP5_IOPAD(0x0118, PIN_OUTPUT | MUX_MODE3) /* rfbi_data5.dispc_data5 */ + OMAP5_IOPAD(0x011a, PIN_OUTPUT | MUX_MODE3) /* rfbi_data4.dispc_data4 */ + OMAP5_IOPAD(0x011c, PIN_OUTPUT | MUX_MODE3) /* rfbi_data3.dispc_data3 */ + OMAP5_IOPAD(0x011e, PIN_OUTPUT | MUX_MODE3) /* rfbi_data2.dispc_data2 */ + OMAP5_IOPAD(0x0120, PIN_OUTPUT | MUX_MODE3) /* rfbi_data1.dispc_data1 */ + OMAP5_IOPAD(0x0122, PIN_OUTPUT | MUX_MODE3) /* rfbi_data0.dispc_data0 */ + OMAP5_IOPAD(0x0124, PIN_OUTPUT | MUX_MODE3) /* rfbi_we.dispc_vsync */ + OMAP5_IOPAD(0x0126, PIN_OUTPUT | MUX_MODE3) /* rfbi_cs0.dispc_hsync */ + OMAP5_IOPAD(0x0128, PIN_OUTPUT | MUX_MODE3) /* rfbi_a0.dispc_de */ + OMAP5_IOPAD(0x012a, PIN_OUTPUT | MUX_MODE3) /* rfbi_re.dispc_pclk */ + OMAP5_IOPAD(0x012c, PIN_OUTPUT | MUX_MODE3) /* rfbi_hsync0.dispc_data17 */ + OMAP5_IOPAD(0x012e, PIN_OUTPUT | MUX_MODE3) /* rfbi_te_vsync0.dispc_data16 */ + OMAP5_IOPAD(0x0130, PIN_OUTPUT | MUX_MODE3) /* gpio6_182.dispc_data18 */ + OMAP5_IOPAD(0x0132, PIN_OUTPUT | MUX_MODE3) /* gpio6_183.dispc_data19 */ + OMAP5_IOPAD(0x0134, PIN_OUTPUT | MUX_MODE3) /* gpio6_184.dispc_data20 */ + OMAP5_IOPAD(0x0136, PIN_OUTPUT | MUX_MODE3) /* gpio6_185.dispc_data21 */ + OMAP5_IOPAD(0x0138, PIN_OUTPUT | MUX_MODE3) /* gpio6_186.dispc_data22 */ + OMAP5_IOPAD(0x013a, PIN_OUTPUT | MUX_MODE3) /* gpio6_187.dispc_data23 */ + >; + }; }; &mmc1 { @@ -398,6 +515,13 @@ }; }; +&i2c2 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c2_pins>; + + clock-frequency = <100000>; +}; + &usbhshost { port2-mode = "ehci-hsic"; port3-mode = "ehci-hsic"; @@ -410,3 +534,37 @@ &cpu0 { cpu0-supply = <&smps123_reg>; }; + +&dss { + status = "ok"; + + pinctrl-names = "default"; + pinctrl-0 = <&dss_dpi_pins>; + + port { + dpi_dvi_out: endpoint@0 { + remote-endpoint = <&tfp410_in>; + data-lines = <24>; + }; + }; +}; + +&dsi2 { + status = "ok"; + vdd-supply = <&ldo4_reg>; +}; + +&hdmi { + status = "ok"; + vdda-supply = <&ldo4_reg>; + + pinctrl-names = "default"; + pinctrl-0 = <&dss_hdmi_pins>; + + port { + hdmi_out: endpoint { + remote-endpoint = <&hdmi_connector_in>; + lanes = <1 0 3 2 5 4 7 6>; + }; + }; +};