| Message ID | 1413901848-32268-2-git-send-email-nm@ti.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
diff --git a/arch/arm/boot/dts/dra72-evm.dts b/arch/arm/boot/dts/dra72-evm.dts index 4107428..671e473 100644 --- a/arch/arm/boot/dts/dra72-evm.dts +++ b/arch/arm/boot/dts/dra72-evm.dts @@ -26,6 +26,12 @@ 0x404 (PIN_INPUT | MUX_MODE0) /* i2c1_scl.i2c1_scl */ >; }; + + tps65917_pins_default: tps65917_pins_default { + pinctrl-single,pins = < + 0x424 (PIN_INPUT_PULLUP | MUX_MODE1) /* wakeup3.sys_nirq1 */ + >; + }; }; &i2c1 { @@ -38,6 +44,9 @@ compatible = "ti,tps65917"; reg = <0x58>; + pinctrl-names = "default"; + pinctrl-0 = <&tps65917_pins_default>; + interrupts = <GIC_SPI 2 IRQ_TYPE_NONE>; /* IRQ_SYS_1N */ interrupt-parent = <&gic>; interrupt-controller;
Even thought sys_nirq1 is hardwired on the SoC for the pin, it is better to configure the pin to the required mux configuration. Signed-off-by: Nishanth Menon <nm@ti.com> --- arch/arm/boot/dts/dra72-evm.dts | 9 +++++++++ 1 file changed, 9 insertions(+)