From patchwork Thu Nov 6 12:01:41 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Enric Balletbo i Serra X-Patchwork-Id: 5241291 Return-Path: X-Original-To: patchwork-linux-omap@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id DBBA39F4D4 for ; Thu, 6 Nov 2014 12:02:30 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id C29D02011D for ; Thu, 6 Nov 2014 12:02:29 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id AC61720108 for ; Thu, 6 Nov 2014 12:02:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751262AbaKFMC1 (ORCPT ); Thu, 6 Nov 2014 07:02:27 -0500 Received: from mail-wi0-f174.google.com ([209.85.212.174]:43451 "EHLO mail-wi0-f174.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751062AbaKFMCY (ORCPT ); Thu, 6 Nov 2014 07:02:24 -0500 Received: by mail-wi0-f174.google.com with SMTP id d1so1238431wiv.13 for ; Thu, 06 Nov 2014 04:02:23 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=wY7RaT6iYGWil5Buahn8HboQ42cBXk0pjnP/DAQHMmg=; b=DEMF071YEEsk7FevZgRNSu7lOEXXGmo0GIoZ9xl3NUB6pTWe0/on/B854xlsF8Yj3e Ts2IoKY3QyeS1e0t9SQBa/AbZTvbWYwtlK2NFgjgAV93eiOY9SUS0RmHe6a5XmGMZanL keOuki8mTPhAjx7BF7RtMJjXoGD5utYpVAHbNsZmiY/kDzwaGPOhXyv+b6wOaQqelgPR ff6mt7OWLI0QOnG0TjW0wFVD87cdbbzaX37Dvees+8lESDWwYSV9AwvF6NH7v7ng7/4Y 5qF12720dUR7J1aWBKcZfoCjvRNxt2ATsu0nUFTnFy1sF1DQ3ZZP8ux6K3WHd9lxvVA+ PgBQ== X-Received: by 10.194.250.41 with SMTP id yz9mr5172785wjc.34.1415275341468; Thu, 06 Nov 2014 04:02:21 -0800 (PST) Received: from localhost.localdomain (43.Red-2-139-180.staticIP.rima-tde.net. [2.139.180.43]) by mx.google.com with ESMTPSA id bc1sm18533956wib.16.2014.11.06.04.02.20 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 06 Nov 2014 04:02:20 -0800 (PST) From: Enric Balletbo i Serra To: linux-omap@vger.kernel.org, tony@atomide.com Cc: javier@dowhile0.org, devicetree@vger.kernel.org, Enric Balletbo i Serra Subject: [PATCH 01/11] ARM: dts: omap3-igep00x0: Fix UART2 pins that aren't common. Date: Thu, 6 Nov 2014 13:01:41 +0100 Message-Id: <1415275311-6857-2-git-send-email-eballetbo@iseebcn.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1415275311-6857-1-git-send-email-eballetbo@iseebcn.com> References: <1415275311-6857-1-git-send-email-eballetbo@iseebcn.com> Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Spam-Status: No, score=-7.5 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP UART2 is used to connect the processor with the bluetooth chip, these pins are not common between IGEPv2 boards and IGEP COM MODULE boards. This patch muxes the correct pins for every board and removes UART2 configuration from common omap3-igep.dtsi file. Signed-off-by: Enric Balletbo i Serra Acked-by: Javier Martinez Canillas --- arch/arm/boot/dts/omap3-igep.dtsi | 12 ------------ arch/arm/boot/dts/omap3-igep0020.dts | 14 ++++++++++++++ arch/arm/boot/dts/omap3-igep0030.dts | 16 ++++++++++++++++ 3 files changed, 30 insertions(+), 12 deletions(-) diff --git a/arch/arm/boot/dts/omap3-igep.dtsi b/arch/arm/boot/dts/omap3-igep.dtsi index e2d163b..fb1040d 100644 --- a/arch/arm/boot/dts/omap3-igep.dtsi +++ b/arch/arm/boot/dts/omap3-igep.dtsi @@ -53,13 +53,6 @@ >; }; - uart2_pins: pinmux_uart2_pins { - pinctrl-single,pins = < - 0x14a (PIN_INPUT | MUX_MODE0) /* uart2_rx.uart2_rx */ - 0x148 (PIN_OUTPUT | MUX_MODE0) /* uart2_tx.uart2_tx */ - >; - }; - uart3_pins: pinmux_uart3_pins { pinctrl-single,pins = < 0x16e (PIN_INPUT | MUX_MODE0) /* uart3_rx.uart3_rx */ @@ -198,11 +191,6 @@ pinctrl-0 = <&uart1_pins>; }; -&uart2 { - pinctrl-names = "default"; - pinctrl-0 = <&uart2_pins>; -}; - &uart3 { pinctrl-names = "default"; pinctrl-0 = <&uart3_pins>; diff --git a/arch/arm/boot/dts/omap3-igep0020.dts b/arch/arm/boot/dts/omap3-igep0020.dts index cc9343e..87d77e4 100644 --- a/arch/arm/boot/dts/omap3-igep0020.dts +++ b/arch/arm/boot/dts/omap3-igep0020.dts @@ -149,6 +149,15 @@ 0x0da (PIN_OUTPUT | MUX_MODE0) /* dss_data23.dss_data23 */ >; }; + + uart2_pins: pinmux_uart2_pins { + pinctrl-single,pins = < + OMAP3_CORE1_IOPAD(0x2174, PIN_INPUT | MUX_MODE0) /* uart2_cts.uart2_cts */ + OMAP3_CORE1_IOPAD(0x2176, PIN_OUTPUT | MUX_MODE0) /* uart2_rts .uart2_rts*/ + OMAP3_CORE1_IOPAD(0x2178, PIN_OUTPUT | MUX_MODE0) /* uart2_tx.uart2_tx */ + OMAP3_CORE1_IOPAD(0x217a, PIN_INPUT | MUX_MODE0) /* uart2_rx.uart2_rx */ + >; + }; }; &omap3_pmx_core2 { @@ -256,6 +265,11 @@ }; }; +&uart2 { + pinctrl-names = "default"; + pinctrl-0 = <&uart2_pins>; +}; + &usbhshost { port1-mode = "ehci-phy"; }; diff --git a/arch/arm/boot/dts/omap3-igep0030.dts b/arch/arm/boot/dts/omap3-igep0030.dts index 84b7452..2df1396 100644 --- a/arch/arm/boot/dts/omap3-igep0030.dts +++ b/arch/arm/boot/dts/omap3-igep0030.dts @@ -46,6 +46,17 @@ }; }; +&omap3_pmx_core { + uart2_pins: pinmux_uart2_pins { + pinctrl-single,pins = < + OMAP3_CORE1_IOPAD(0x216c, PIN_INPUT | MUX_MODE1) /* mcbsp3_dx.uart2_cts */ + OMAP3_CORE1_IOPAD(0x216e, PIN_OUTPUT | MUX_MODE1) /* mcbsp3_dr.uart2_rts */ + OMAP3_CORE1_IOPAD(0x2170, PIN_OUTPUT | MUX_MODE1) /* mcbsp3_clk.uart2_tx */ + OMAP3_CORE1_IOPAD(0x2172, PIN_INPUT | MUX_MODE1) /* mcbsp3_fsx.uart2_rx */ + >; + }; +}; + &omap3_pmx_core2 { leds_pins: pinmux_leds_pins { pinctrl-single,pins = < @@ -104,3 +115,8 @@ }; }; }; + +&uart2 { + pinctrl-names = "default"; + pinctrl-0 = <&uart2_pins>; +};