From patchwork Thu Nov 6 12:01:45 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Enric Balletbo i Serra X-Patchwork-Id: 5241331 Return-Path: X-Original-To: patchwork-linux-omap@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 0D1BF9F4D4 for ; Thu, 6 Nov 2014 12:02:37 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id E4C122010F for ; Thu, 6 Nov 2014 12:02:35 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 9EA992011E for ; Thu, 6 Nov 2014 12:02:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751405AbaKFMCd (ORCPT ); Thu, 6 Nov 2014 07:02:33 -0500 Received: from mail-wi0-f175.google.com ([209.85.212.175]:62789 "EHLO mail-wi0-f175.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751051AbaKFMC0 (ORCPT ); Thu, 6 Nov 2014 07:02:26 -0500 Received: by mail-wi0-f175.google.com with SMTP id ex7so1243155wid.8 for ; Thu, 06 Nov 2014 04:02:25 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=DWa264NgvFuzhJIpP4SGWVzNgFIv6KRqFcqqCW9l+fc=; b=Qp9OfKP/JuC56A1FCmtjJ1m1Q3s6OjY0u1yT+Hj3CaaB5SdLdrEg6Wg209dhnp2CsP itjUccbnWP8j2mdyT6+SBOIrdljU6J7rWl7eteEjs8VS4iACiSNGEZTFGEt6ElGo+JGh U2algL/bxrCpIDBr5TBiCxm0O7l0idlhZLJRShnv5q49pWCVV0k/jKBXgZsgGNt238nL Fo4y/LKkVTtVDaglZT8kcwuEPJpCLCT4X2nGG+63fxXew21DcPSNRouN70PF6qCOFr2l UnhsrX8HdCvKW7tK7teLAAXiqq15b0Q6Yk15DnaaSz5wpTotDBo5bjNO1pbmazZBSlmz NQEA== X-Received: by 10.180.96.162 with SMTP id dt2mr35307736wib.66.1415275344860; Thu, 06 Nov 2014 04:02:24 -0800 (PST) Received: from localhost.localdomain (43.Red-2-139-180.staticIP.rima-tde.net. [2.139.180.43]) by mx.google.com with ESMTPSA id bc1sm18533956wib.16.2014.11.06.04.02.24 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 06 Nov 2014 04:02:24 -0800 (PST) From: Enric Balletbo i Serra To: linux-omap@vger.kernel.org, tony@atomide.com Cc: javier@dowhile0.org, devicetree@vger.kernel.org, Enric Balletbo i Serra Subject: [PATCH 05/11] ARM: dts: omap3-igep00x0: Move outside common file the on board Wifi module. Date: Thu, 6 Nov 2014 13:01:45 +0100 Message-Id: <1415275311-6857-6-git-send-email-eballetbo@iseebcn.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1415275311-6857-1-git-send-email-eballetbo@iseebcn.com> References: <1415275311-6857-1-git-send-email-eballetbo@iseebcn.com> Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Spam-Status: No, score=-7.5 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP New IGEP boards revisions will use another Wifi module, so this patch moves the DT nodes outside the common omap3-igep.dtsi file to specific DT for every board. Signed-off-by: Enric Balletbo i Serra Acked-by: Javier Martinez Canillas --- arch/arm/boot/dts/omap3-igep.dtsi | 29 --------------------------- arch/arm/boot/dts/omap3-igep0020.dts | 39 ++++++++++++++++++++++++++++++++++++ arch/arm/boot/dts/omap3-igep0030.dts | 39 ++++++++++++++++++++++++++++++++++++ 3 files changed, 78 insertions(+), 29 deletions(-) diff --git a/arch/arm/boot/dts/omap3-igep.dtsi b/arch/arm/boot/dts/omap3-igep.dtsi index 04a58ab..6118e7f 100644 --- a/arch/arm/boot/dts/omap3-igep.dtsi +++ b/arch/arm/boot/dts/omap3-igep.dtsi @@ -31,18 +31,6 @@ regulator-always-on; }; - lbee1usjyc_vmmc: lbee1usjyc_vmmc { - pinctrl-names = "default"; - pinctrl-0 = <&lbee1usjyc_pins>; - compatible = "regulator-fixed"; - regulator-name = "regulator-lbee1usjyc"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - gpio = <&gpio5 10 GPIO_ACTIVE_HIGH>; /* gpio_138 WIFI_PDN */ - startup-delay-us = <10000>; - enable-active-high; - vin-supply = <&vdd33>; - }; }; &omap3_pmx_core { @@ -60,15 +48,6 @@ >; }; - /* WiFi/BT combo */ - lbee1usjyc_pins: pinmux_lbee1usjyc_pins { - pinctrl-single,pins = < - 0x136 (PIN_OUTPUT | MUX_MODE4) /* sdmmc2_dat5.gpio_137 */ - 0x138 (PIN_OUTPUT | MUX_MODE4) /* sdmmc2_dat6.gpio_138 */ - 0x13a (PIN_OUTPUT | MUX_MODE4) /* sdmmc2_dat7.gpio_139 */ - >; - }; - mcbsp2_pins: pinmux_mcbsp2_pins { pinctrl-single,pins = < 0x10c (PIN_INPUT | MUX_MODE0) /* mcbsp2_fsx.mcbsp2_fsx */ @@ -223,14 +202,6 @@ bus-width = <4>; }; -&mmc2 { - pinctrl-names = "default"; - pinctrl-0 = <&mmc2_pins>; - vmmc-supply = <&lbee1usjyc_vmmc>; - bus-width = <4>; - non-removable; -}; - &mmc3 { status = "disabled"; }; diff --git a/arch/arm/boot/dts/omap3-igep0020.dts b/arch/arm/boot/dts/omap3-igep0020.dts index 75a3ac3..0d82f09 100644 --- a/arch/arm/boot/dts/omap3-igep0020.dts +++ b/arch/arm/boot/dts/omap3-igep0020.dts @@ -45,6 +45,27 @@ }; }; + /* Regulator to trigger the WIFI_PDN signal of the Wifi module */ + lbee1usjyc_pdn: lbee1usjyc_pdn { + compatible = "regulator-fixed"; + regulator-name = "regulator-lbee1usjyc-pdn"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpio5 10 GPIO_ACTIVE_HIGH>; /* gpio_138 - WIFI_PDN */ + startup-delay-us = <10000>; + enable-active-high; + }; + + /* Regulator to trigger the RESET_N_W signal of the Wifi module */ + lbee1usjyc_reset_n_w: lbee1usjyc_reset_n_w { + compatible = "regulator-fixed"; + regulator-name = "regulator-lbee1usjyc-reset-n-w"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpio5 11 GPIO_ACTIVE_HIGH>; /* gpio_139 - RESET_N_W */ + enable-active-high; + }; + /* HS USB Port 1 Power */ hsusb1_power: hsusb1_power_reg { compatible = "regulator-fixed"; @@ -150,6 +171,14 @@ >; }; + lbee1usjyc_pins: pinmux_lbee1usjyc_pins { + pinctrl-single,pins = < + OMAP3_CORE1_IOPAD(0x2166, PIN_OUTPUT | MUX_MODE4) /* sdmmc2_dat5.gpio_137 - RESET_N_W */ + OMAP3_CORE1_IOPAD(0x2168, PIN_OUTPUT | MUX_MODE4) /* sdmmc2_dat6.gpio_138 - WIFI_PDN */ + OMAP3_CORE1_IOPAD(0x216a, PIN_OUTPUT | MUX_MODE4) /* sdmmc2_dat7.gpio_139 - RST_N_B */ + >; + }; + uart2_pins: pinmux_uart2_pins { pinctrl-single,pins = < OMAP3_CORE1_IOPAD(0x2174, PIN_INPUT | MUX_MODE0) /* uart2_cts.uart2_cts */ @@ -218,6 +247,16 @@ }; }; +/* On board Wifi module */ +&mmc2 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc2_pins &lbee1usjyc_pins>; + vmmc-supply = <&lbee1usjyc_pdn>; + vmmc_aux-supply = <&lbee1usjyc_reset_n_w>; + bus-width = <4>; + non-removable; +}; + &uart2 { pinctrl-names = "default"; pinctrl-0 = <&uart2_pins>; diff --git a/arch/arm/boot/dts/omap3-igep0030.dts b/arch/arm/boot/dts/omap3-igep0030.dts index d7527b6..cc2a374 100644 --- a/arch/arm/boot/dts/omap3-igep0030.dts +++ b/arch/arm/boot/dts/omap3-igep0030.dts @@ -44,9 +44,38 @@ default-state = "off"; }; }; + + /* Regulator to trigger the WIFI_PDN signal of the Wifi module */ + lbee1usjyc_pdn: lbee1usjyc_pdn { + compatible = "regulator-fixed"; + regulator-name = "regulator-lbee1usjyc-pdn"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpio5 10 GPIO_ACTIVE_HIGH>; /* gpio_138 - WIFI_PDN */ + startup-delay-us = <10000>; + enable-active-high; + }; + + /* Regulator to trigger the RESET_N_W signal of the Wifi module */ + lbee1usjyc_reset_n_w: lbee1usjyc_reset_n_w { + compatible = "regulator-fixed"; + regulator-name = "regulator-lbee1usjyc-reset-n-w"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpio5 11 GPIO_ACTIVE_HIGH>; /* gpio_139 - RESET_N_W */ + enable-active-high; + }; }; &omap3_pmx_core { + lbee1usjyc_pins: pinmux_lbee1usjyc_pins { + pinctrl-single,pins = < + OMAP3_CORE1_IOPAD(0x2166, PIN_OUTPUT | MUX_MODE4) /* sdmmc2_dat5.gpio_137 - RESET_N_W */ + OMAP3_CORE1_IOPAD(0x2168, PIN_OUTPUT | MUX_MODE4) /* sdmmc2_dat6.gpio_138 - WIFI_PDN */ + OMAP3_CORE1_IOPAD(0x216a, PIN_OUTPUT | MUX_MODE4) /* sdmmc2_dat7.gpio_139 - RST_N_B */ + >; + }; + uart2_pins: pinmux_uart2_pins { pinctrl-single,pins = < OMAP3_CORE1_IOPAD(0x216c, PIN_INPUT | MUX_MODE1) /* mcbsp3_dx.uart2_cts */ @@ -65,6 +94,16 @@ }; }; +/* On board Wifi module */ +&mmc2 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc2_pins &lbee1usjyc_pins>; + vmmc-supply = <&lbee1usjyc_pdn>; + vmmc_aux-supply = <&lbee1usjyc_reset_n_w>; + bus-width = <4>; + non-removable; +}; + &uart2 { pinctrl-names = "default"; pinctrl-0 = <&uart2_pins>;