From patchwork Fri Dec 26 20:53:13 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Felipe Balbi X-Patchwork-Id: 5543831 Return-Path: X-Original-To: patchwork-linux-omap@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id B523A9F2E2 for ; Fri, 26 Dec 2014 20:54:02 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id E9FAB20218 for ; Fri, 26 Dec 2014 20:54:01 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 1FB5220204 for ; Fri, 26 Dec 2014 20:54:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751065AbaLZUyA (ORCPT ); Fri, 26 Dec 2014 15:54:00 -0500 Received: from devils.ext.ti.com ([198.47.26.153]:57545 "EHLO devils.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750740AbaLZUx7 (ORCPT ); Fri, 26 Dec 2014 15:53:59 -0500 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by devils.ext.ti.com (8.13.7/8.13.7) with ESMTP id sBQKrZ6K016139; Fri, 26 Dec 2014 14:53:35 -0600 Received: from DFLE72.ent.ti.com (dfle72.ent.ti.com [128.247.5.109]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id sBQKrZ1T021991; Fri, 26 Dec 2014 14:53:35 -0600 Received: from dflp33.itg.ti.com (10.64.6.16) by DFLE72.ent.ti.com (128.247.5.109) with Microsoft SMTP Server id 14.3.174.1; Fri, 26 Dec 2014 14:53:35 -0600 Received: from localhost (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp33.itg.ti.com (8.14.3/8.13.8) with ESMTP id sBQKrZgD026368; Fri, 26 Dec 2014 14:53:35 -0600 From: Felipe Balbi To: Tony Lindgren CC: Linux OMAP Mailing List , Linux ARM Kernel Mailing List , , Felipe Balbi Subject: [PATCH v2] arm: boot: dts: am437x-idk: add gpio-based power key Date: Fri, 26 Dec 2014 14:53:13 -0600 Message-ID: <1419627193-20838-1-git-send-email-balbi@ti.com> X-Mailer: git-send-email 2.2.0 In-Reply-To: <1419626116-12833-1-git-send-email-balbi@ti.com> References: <1419626116-12833-1-git-send-email-balbi@ti.com> MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP AM437x IDK board has a User Switch which we can program to whatever we want. Because this board doesn't have a PMIC which can give us power button presses, let's use this user switch as a gpio-keys power button. Signed-off-by: Felipe Balbi --- Changes since v1: - Add explicit pinctrl data. (note that ball reset state is already MUX_MODE7, and even though it was already working before, as can be seen from v1's boot logs, it's best that we cope with possibly broken bootloaders) depends on [1]. Boot logs at [2]. Note that this can rather easily be folded into the original patch if so desired. [1] http://marc.info/?l=linux-omap&m=141928747902983&w=2 [2] http://hastebin.com/qezicehunu arch/arm/boot/dts/am437x-idk-evm.dts | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/arch/arm/boot/dts/am437x-idk-evm.dts b/arch/arm/boot/dts/am437x-idk-evm.dts index b52dd0a..f9a17e2 100644 --- a/arch/arm/boot/dts/am437x-idk-evm.dts +++ b/arch/arm/boot/dts/am437x-idk-evm.dts @@ -96,9 +96,29 @@ regulator-boot-on; vin-supply = <&v1_5dreg>; }; + + gpio_keys: gpio_keys { + compatible = "gpio-keys"; + pinctrl-names = "default"; + pinctrl-0 = <&gpio_keys_pins_default>; + #address-cells = <1>; + #size-cells = <0>; + + switch@0 { + label = "power-button"; + linux,code = ; + gpios = <&gpio4 2 GPIO_ACTIVE_LOW>; + }; + }; }; &am43xx_pinmux { + gpio_keys_pins_default: gpio_keys_pins_default { + pinctrl-single,pins = < + 0x1b8 (PIN_INPUT | MUX_MODE7) /* cam0_field.gpio4_2 */ + >; + }; + i2c0_pins_default: i2c0_pins_default { pinctrl-single,pins = < 0x188 (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_sda.i2c0_sda */ @@ -282,6 +302,10 @@ status = "okay"; }; +&gpio4 { + status = "okay"; +}; + &gpio5 { status = "okay"; };