From patchwork Sun Dec 28 14:30:49 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Lifshitz X-Patchwork-Id: 5545571 Return-Path: X-Original-To: patchwork-linux-omap@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id CCAB49F2ED for ; Sun, 28 Dec 2014 14:31:52 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 0234E20172 for ; Sun, 28 Dec 2014 14:31:50 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 86A632015A for ; Sun, 28 Dec 2014 14:31:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751782AbaL1Obs (ORCPT ); Sun, 28 Dec 2014 09:31:48 -0500 Received: from softlayer.compulab.co.il ([50.23.254.55]:38505 "EHLO compulab.co.il" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751545AbaL1Obr (ORCPT ); Sun, 28 Dec 2014 09:31:47 -0500 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=compulab.co.il; s=default; h=References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From; bh=KdRwEEo83yicsppqrf5ciQQVh569pLpcOmoHWAW6ePs=; b=SF32at1OT6UIgUS3yj4m9r1YtDnhGNbYtfSl1qVwFfbaq5Kb5Tb3flYXQ03JwbeVoZkPdPP+janoMAYC+YxFfoAMT8NeingNsjnzoLc5zgb3fytW5zX2w4TmMGT0HKNmSUfDGxLM3fsIUOZyQunA8DyncLCoNARL7iQ/0X9Zp50=; Received: from [82.166.188.245] (port=37525 helo=zimbra-mta.compulab.co.il) by softlayer.compulab.co.il with esmtp (Exim 4.84) (envelope-from ) id 1Y5Esk-0003s6-BY; Sun, 28 Dec 2014 16:31:46 +0200 Received: from localhost (localhost [127.0.0.1]) by zimbra-mta.compulab.co.il (Postfix) with ESMTP id 6185E483D87; Sun, 28 Dec 2014 16:31:45 +0200 (IST) Received: from zimbra-mta.compulab.co.il ([127.0.0.1]) by localhost (zimbra-mta.compulab.co.il [127.0.0.1]) (amavisd-new, port 10032) with ESMTP id AVIgSTzqJsmt; Sun, 28 Dec 2014 16:31:40 +0200 (IST) Received: from localhost (localhost [127.0.0.1]) by zimbra-mta.compulab.co.il (Postfix) with ESMTP id 785F0483D89; Sun, 28 Dec 2014 16:31:40 +0200 (IST) X-Virus-Scanned: amavisd-new at zimbra-mta.compulab.co.il Received: from zimbra-mta.compulab.co.il ([127.0.0.1]) by localhost (zimbra-mta.compulab.co.il [127.0.0.1]) (amavisd-new, port 10026) with ESMTP id y6MS2nBLGs0O; Sun, 28 Dec 2014 16:31:40 +0200 (IST) Received: from localhost.localdomain (lifshitz-linux.compulab.local [192.168.11.10]) by zimbra-mta.compulab.co.il (Postfix) with ESMTPSA id 465BA483D87; Sun, 28 Dec 2014 16:31:40 +0200 (IST) From: Dmitry Lifshitz To: =?UTF-8?q?Beno=C3=AEt=20Cousson?= , Tony Lindgren , linux-omap@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: Dmitry Lifshitz Subject: [PATCH v2] ARM: dts: cm-t3x: add NAND support Date: Sun, 28 Dec 2014 16:30:49 +0200 Message-Id: <1419777049-25271-1-git-send-email-lifshitz@compulab.co.il> X-Mailer: git-send-email 1.7.5.4 In-Reply-To: <54A00BD6.8010507@compulab.co.il> References: <54A00BD6.8010507@compulab.co.il> X-AntiAbuse: This header was added to track abuse, please include it with any abuse report X-AntiAbuse: Primary Hostname - softlayer.compulab.co.il X-AntiAbuse: Original Domain - vger.kernel.org X-AntiAbuse: Originator/Caller UID/GID - [47 12] / [47 12] X-AntiAbuse: Sender Address Domain - compulab.co.il X-Get-Message-Sender-Via: softlayer.compulab.co.il: acl_c_relayhosts_text_entry: lifshitz@compulab.co.il|compulab.co.il Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Spam-Status: No, score=-6.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID,T_RP_MATCHES_RCVD,UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP CM-T3517, CM-T3530 and CM-T3730 features NAND storage chip connected to GPMC bus. Add GPMC DT entry into the root DT file omap3-cm-t3x.dtsi, common for all three modules. NAND timings are calculated to be safe for CM-T3x devices as it works now in non DT boot (in this case the timings are updated by U-Boot). Update GPMC ranges in boards DT files to include all connected devices. Signed-off-by: Dmitry Lifshitz Acked-by: Igor Grinberg Acked-by: Roger Quadros --- v2 * Update GPMC ranges with NAND values in omap3-cm-t3x30.dtsi. * Add commit message details arch/arm/boot/dts/omap3-cm-t3x.dtsi | 58 +++++++++++++++++++++++++++++++++ arch/arm/boot/dts/omap3-cm-t3x30.dtsi | 3 +- arch/arm/boot/dts/omap3-sbc-t3517.dts | 4 ++ arch/arm/boot/dts/omap3-sbc-t3530.dts | 10 ++---- arch/arm/boot/dts/omap3-sbc-t3730.dts | 5 ++- 5 files changed, 70 insertions(+), 10 deletions(-) diff --git a/arch/arm/boot/dts/omap3-cm-t3x.dtsi b/arch/arm/boot/dts/omap3-cm-t3x.dtsi index 6ea6d46..4d091ca 100644 --- a/arch/arm/boot/dts/omap3-cm-t3x.dtsi +++ b/arch/arm/boot/dts/omap3-cm-t3x.dtsi @@ -259,3 +259,61 @@ pinctrl-names = "default"; pinctrl-0 = <&mcbsp2_pins>; }; + +&gpmc { + ranges = <0 0 0x00000000 0x01000000>; + + nand@0,0 { + reg = <0 0 4>; /* CS0, offset 0, IO size 4 */ + nand-bus-width = <8>; + gpmc,device-width = <1>; + ti,nand-ecc-opt = "sw"; + + gpmc,cs-on-ns = <0>; + gpmc,cs-rd-off-ns = <120>; + gpmc,cs-wr-off-ns = <120>; + + gpmc,adv-on-ns = <0>; + gpmc,adv-rd-off-ns = <120>; + gpmc,adv-wr-off-ns = <120>; + + gpmc,we-on-ns = <6>; + gpmc,we-off-ns = <90>; + + gpmc,oe-on-ns = <6>; + gpmc,oe-off-ns = <90>; + + gpmc,page-burst-access-ns = <6>; + gpmc,access-ns = <72>; + gpmc,cycle2cycle-delay-ns = <60>; + + gpmc,rd-cycle-ns = <120>; + gpmc,wr-cycle-ns = <120>; + gpmc,wr-access-ns = <186>; + gpmc,wr-data-mux-bus-ns = <90>; + + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "xloader"; + reg = <0 0x80000>; + }; + partition@0x80000 { + label = "uboot"; + reg = <0x80000 0x1e0000>; + }; + partition@0x260000 { + label = "uboot environment"; + reg = <0x260000 0x40000>; + }; + partition@0x2a0000 { + label = "linux"; + reg = <0x2a0000 0x400000>; + }; + partition@0x6a0000 { + label = "rootfs"; + reg = <0x6a0000 0x1f880000>; + }; + }; +}; diff --git a/arch/arm/boot/dts/omap3-cm-t3x30.dtsi b/arch/arm/boot/dts/omap3-cm-t3x30.dtsi index 9a4a3ab..d9e92b6 100644 --- a/arch/arm/boot/dts/omap3-cm-t3x30.dtsi +++ b/arch/arm/boot/dts/omap3-cm-t3x30.dtsi @@ -50,7 +50,8 @@ #include "omap-gpmc-smsc911x.dtsi" &gpmc { - ranges = <5 0 0x2c000000 0x01000000>; + ranges = <5 0 0x2c000000 0x01000000>, /* CM-T3x30 SMSC9x Eth */ + <0 0 0x00000000 0x01000000>; /* CM-T3x NAND */ smsc1: ethernet@gpmc { compatible = "smsc,lan9221", "smsc,lan9115"; diff --git a/arch/arm/boot/dts/omap3-sbc-t3517.dts b/arch/arm/boot/dts/omap3-sbc-t3517.dts index 1798653..c2d5c28 100644 --- a/arch/arm/boot/dts/omap3-sbc-t3517.dts +++ b/arch/arm/boot/dts/omap3-sbc-t3517.dts @@ -69,3 +69,7 @@ }; }; +&gpmc { + ranges = <4 0 0x2d000000 0x01000000>, /* SB-T35 SMSC9x Eth */ + <0 0 0x00000000 0x01000000>; /* CM-T3x NAND */ +}; diff --git a/arch/arm/boot/dts/omap3-sbc-t3530.dts b/arch/arm/boot/dts/omap3-sbc-t3530.dts index c994f0f..834bc78 100644 --- a/arch/arm/boot/dts/omap3-sbc-t3530.dts +++ b/arch/arm/boot/dts/omap3-sbc-t3530.dts @@ -26,14 +26,10 @@ }; }; -/* - * The following ranges correspond to SMSC9x eth chips on CM-T3530 CoM and - * SB-T35 baseboard respectively. - * This setting includes both chips in SBC-T3530 board device tree. - */ &gpmc { - ranges = <5 0 0x2c000000 0x01000000>, - <4 0 0x2d000000 0x01000000>; + ranges = <5 0 0x2c000000 0x01000000>, /* CM-T3x30 SMSC9x Eth */ + <4 0 0x2d000000 0x01000000>, /* SB-T35 SMSC9x Eth */ + <0 0 0x00000000 0x01000000>; /* CM-T3x NAND */ }; &mmc1 { diff --git a/arch/arm/boot/dts/omap3-sbc-t3730.dts b/arch/arm/boot/dts/omap3-sbc-t3730.dts index 5bdddf2..73c7bf4 100644 --- a/arch/arm/boot/dts/omap3-sbc-t3730.dts +++ b/arch/arm/boot/dts/omap3-sbc-t3730.dts @@ -27,8 +27,9 @@ }; &gpmc { - ranges = <5 0 0x2c000000 0x01000000>, - <4 0 0x2d000000 0x01000000>; + ranges = <5 0 0x2c000000 0x01000000>, /* CM-T3x30 SMSC9x Eth */ + <4 0 0x2d000000 0x01000000>, /* SB-T35 SMSC9x Eth */ + <0 0 0x00000000 0x01000000>; /* CM-T3x NAND */ }; &dss {