@@ -44,6 +44,7 @@
#define OMAP4_MON_L2X0_AUXCTRL_INDEX 0x109
#define OMAP4_MON_L2X0_SETLATENCY_INDEX 0x112
#define OMAP4_MON_L2X0_PREFETCH_INDEX 0x113
+#define AM43X_MON_L2X0_SETFILTER_INDEX 0x114
#define OMAP5_DRA7_MON_SET_CNTFRQ_INDEX 0x109
#define OMAP5_MON_AMBA_IF_INDEX 0x108
@@ -206,6 +206,27 @@ void omap4_l2c310_write_sec(unsigned long val, unsigned reg)
return;
}
+ case L310_ADDR_FILTER_START:
+ case L310_ADDR_FILTER_END:
+ {
+ void __iomem *base;
+ u32 filter_start, filter_end;
+
+ if (!soc_is_am437x()) {
+ pr_info_once("OMAP L2C310: ROM does not support filter setting\n");
+ return;
+ }
+
+ base = omap4_get_l2cache_base();
+ filter_start = (reg == L310_ADDR_FILTER_START) ? val :
+ readl_relaxed(base + L310_ADDR_FILTER_START);
+ filter_end = (reg == L310_ADDR_FILTER_END) ? val :
+ readl_relaxed(base + L310_ADDR_FILTER_END);
+ omap_smc1_2(AM43X_MON_L2X0_SETFILTER_INDEX, filter_end,
+ filter_start);
+ return;
+ }
+
default:
WARN_ONCE(1, "OMAP L2C310: ignoring write to reg 0x%x\n", reg);
return;
AM437x generation of processors support programming the PL310 L2Cache controller's address filter start and end registers using a secure montior service. Unfortunately, this secure monitor service is not supported on OMAP4 generation of processors. Information based on: OMAP4430 Public ROM Code API Functional Specfication revision 0.6 (Oct 27, 2010) OMAP4440 Public ROM Code API Functional Specfication revision 0.1 (Oct 27, 2010) Aegis ROM Code Memory and Peripheral Booting Functional Specification version 1.00 (Jan 1, 2014) Signed-off-by: Nishanth Menon <nm@ti.com> --- arch/arm/mach-omap2/omap-secure.h | 1 + arch/arm/mach-omap2/omap4-common.c | 21 +++++++++++++++++++++ 2 files changed, 22 insertions(+)