From patchwork Fri Jan 23 23:11:42 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Felipe Balbi X-Patchwork-Id: 5698161 Return-Path: X-Original-To: patchwork-linux-omap@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id B4E5DC058D for ; Fri, 23 Jan 2015 23:12:21 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id B4CCA202FE for ; Fri, 23 Jan 2015 23:12:19 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id A692820340 for ; Fri, 23 Jan 2015 23:12:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754850AbbAWXMR (ORCPT ); Fri, 23 Jan 2015 18:12:17 -0500 Received: from arroyo.ext.ti.com ([192.94.94.40]:42056 "EHLO arroyo.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752059AbbAWXMO (ORCPT ); Fri, 23 Jan 2015 18:12:14 -0500 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by arroyo.ext.ti.com (8.13.7/8.13.7) with ESMTP id t0NNBnXk024670; Fri, 23 Jan 2015 17:11:49 -0600 Received: from DFLE72.ent.ti.com (dfle72.ent.ti.com [128.247.5.109]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id t0NNBmuF004175; Fri, 23 Jan 2015 17:11:48 -0600 Received: from dflp32.itg.ti.com (10.64.6.15) by DFLE72.ent.ti.com (128.247.5.109) with Microsoft SMTP Server id 14.3.224.2; Fri, 23 Jan 2015 17:11:47 -0600 Received: from localhost (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp32.itg.ti.com (8.14.3/8.13.8) with ESMTP id t0NNBlqk021131; Fri, 23 Jan 2015 17:11:47 -0600 From: Felipe Balbi To: Tony Lindgren , Paul Walmsley CC: Linux OMAP Mailing List , Linux ARM Kernel Mailing List , , Felipe Balbi Subject: [PATCH 2/4] arm: dts: am4372: add missing debugss clocks Date: Fri, 23 Jan 2015 17:11:42 -0600 Message-ID: <1422054704-14915-3-git-send-email-balbi@ti.com> X-Mailer: git-send-email 2.3.0-rc1 In-Reply-To: <1422054704-14915-1-git-send-email-balbi@ti.com> References: <1422054704-14915-1-git-send-email-balbi@ti.com> MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP These clocks are needed so that OMAP HWMOD can control them when we're using performance monitors. Signed-off-by: Felipe Balbi --- arch/arm/boot/dts/am43xx-clocks.dtsi | 51 ++++++++++++++++++++++++++++++++++++ 1 file changed, 51 insertions(+) diff --git a/arch/arm/boot/dts/am43xx-clocks.dtsi b/arch/arm/boot/dts/am43xx-clocks.dtsi index c7dc9dab93a4..9000a5c5b719 100644 --- a/arch/arm/boot/dts/am43xx-clocks.dtsi +++ b/arch/arm/boot/dts/am43xx-clocks.dtsi @@ -362,6 +362,57 @@ clock-div = <1>; }; + dbg_sysclk_ck: dbg_sysclk_ck { + #clock-cells = <0>; + compatible = "ti,gate-clock"; + clocks = <&sys_clkin_ck>; + ti,bit-shift = <8>; + reg = <0x20>; + }; + + dbg_clka_ck: dbg_clka_ck { + #clock-cells = <0>; + compatible = "ti,gate-clock"; + clocks = <&sys_clkin_ck>; + ti,bit-shift = <9>; + reg = <0x20>; + }; + + dbg_clkb_ck: dbg_clkb_ck { + #clock-cells = <0>; + compatible = "ti,gate-clock"; + clocks = <&sys_clkin_ck>; + ti,bit-shift = <10>; + reg = <0x20>; + }; + + dbg_clkc_ck: dbg_clkc_ck { + #clock-cells = <0>; + compatible = "ti,gate-clock"; + clocks = <&sys_clkin_ck>; + ti,bit-shift = <11>; + reg = <0x20>; + }; + + trace_pmd_clk_mux_ck: trace_pmd_clk_mux_ck { + #clock-cells = <0>; + compatible = "ti,mux-clock"; + clocks = <&dbg_sysclk_ck>, <&dbg_clka_ck>, + <&dbg_clkb_ck>, <&dbg_clkc_ck>; + ti,bit-shift = <22>; + reg = <0x20>; + }; + + trace_clk_div_ck: trace_clk_div_ck { + #clock-cells = <0>; + compatible = "ti,divider-clock"; + clocks = <&trace_pmd_clk_mux_ck>; + ti,bit-shift = <24>; + ti,max-div = <4>; + reg = <0x20>; + ti,index-power-of-two; + }; + pruss_ocp_gclk: pruss_ocp_gclk { #clock-cells = <0>; compatible = "ti,mux-clock";