From patchwork Wed May 13 06:54:41 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 6394431 Return-Path: X-Original-To: patchwork-linux-omap@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 3DC7ABEEE1 for ; Wed, 13 May 2015 06:57:36 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 6731B2042C for ; Wed, 13 May 2015 06:57:35 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 878992038A for ; Wed, 13 May 2015 06:57:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753389AbbEMG5Y (ORCPT ); Wed, 13 May 2015 02:57:24 -0400 Received: from mailout4.w1.samsung.com ([210.118.77.14]:43130 "EHLO mailout4.w1.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752760AbbEMGzC (ORCPT ); Wed, 13 May 2015 02:55:02 -0400 Received: from eucpsbgm2.samsung.com (unknown [203.254.199.245]) by mailout4.w1.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTP id <0NOA002ID0JNXJ50@mailout4.w1.samsung.com>; Wed, 13 May 2015 07:54:59 +0100 (BST) X-AuditID: cbfec7f5-f794b6d000001495-5d-5552f543619d Received: from eusync4.samsung.com ( [203.254.199.214]) by eucpsbgm2.samsung.com (EUCPMTA) with SMTP id F8.76.05269.345F2555; Wed, 13 May 2015 07:54:59 +0100 (BST) Received: from localhost.localdomain ([10.252.80.64]) by eusync4.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTPA id <0NOA00ELI0JC0J80@eusync4.samsung.com>; Wed, 13 May 2015 07:54:59 +0100 (BST) From: Krzysztof Kozlowski To: Tero Kristo , Mike Turquette , Stephen Boyd , linux-omap@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Krzysztof Kozlowski Subject: [RFT PATCH 2/8] clk: ti: clk-2xxx: Prevent possible ERR_PTR dereference Date: Wed, 13 May 2015 15:54:41 +0900 Message-id: <1431500087-2275-3-git-send-email-k.kozlowski@samsung.com> X-Mailer: git-send-email 1.9.1 In-reply-to: <1431500087-2275-1-git-send-email-k.kozlowski@samsung.com> References: <1431500087-2275-1-git-send-email-k.kozlowski@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFprILMWRmVeSWpSXmKPExsVy+t/xa7rOX4NCDT7MN7J4/cLQ4mPPPVaL y7vmsFnMXtLPYvF0wkU2ix9nulksljztYHNg97jc18vkcefaHjaPvi2rGD2O39jO5PF5k1wA axSXTUpqTmZZapG+XQJXxquT25gKnvBUXPi8hqWB8T5XFyMnh4SAiUTHrVdsELaYxIV768Fs IYGljBLLtrt3MXIB2f8ZJRb9mcIKkmATMJbYvHwJG0hCROA4o8SKPf3sIAlmAUOJn+/+gNnC AgESG281MYHYLAKqEtO7v4HZvAJuEscuL2SC2CYncfLYZKChHBycAu4Sl+aJgZhCQCX7Guom MPIuYGRYxSiaWppcUJyUnmukV5yYW1yal66XnJ+7iRESUF93MC49ZnWIUYCDUYmHd8bbwFAh 1sSy4srcQ4wSHMxKIrxL3wWFCvGmJFZWpRblxxeV5qQWH2KU5mBREueduet9iJBAemJJanZq akFqEUyWiYNTqoHRmH3yKrsHfV/iYnuO5W5pX8m5321XQ7np3b6Pk1L10y5ppX30Pf6va3rY pJirbxebrT62w8FEaEqMRVnProC1/ptPq7J7P5/zv2KZ6dIFn811M1n+uIdvfzJjKuf7jv/f tx75kPR7r69y1Wm1/PvyiadMtDfkywZ+DjnvN8NfP4P3FRNr8ITfSizFGYmGWsxFxYkABQmV QiQCAAA= Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Provide a wrapper to prevent possible ERR_PTR dereference by clk_get_rate(). The return value of clk_get_sys() was immediately used in clk_get_rate(). The first one may return ERR_PTR and the latter only checks if supplied argument is non-NULL. Signed-off-by: Krzysztof Kozlowski --- drivers/clk/ti/clk-2xxx.c | 18 ++++++++++++++---- 1 file changed, 14 insertions(+), 4 deletions(-) diff --git a/drivers/clk/ti/clk-2xxx.c b/drivers/clk/ti/clk-2xxx.c index c808ab3d2bb2..d6996c3db843 100644 --- a/drivers/clk/ti/clk-2xxx.c +++ b/drivers/clk/ti/clk-2xxx.c @@ -220,6 +220,16 @@ enum { OMAP2_SOC_OMAP2430, }; +static unsigned long __init omap2xxx_clk_get_rate(const char *clk_name) +{ + struct clk *clk = clk_get_sys(NULL, clk_name); + + if (IS_ERR(clk)) + return 0; + + return clk_get_rate(clk); +} + static int __init omap2xxx_dt_clk_init(int soc_type) { ti_dt_clocks_register(omap2xxx_clks); @@ -237,10 +247,10 @@ static int __init omap2xxx_dt_clk_init(int soc_type) ARRAY_SIZE(enable_init_clks)); pr_info("Clocking rate (Crystal/DPLL/MPU): %ld.%01ld/%ld/%ld MHz\n", - (clk_get_rate(clk_get_sys(NULL, "sys_ck")) / 1000000), - (clk_get_rate(clk_get_sys(NULL, "sys_ck")) / 100000) % 10, - (clk_get_rate(clk_get_sys(NULL, "dpll_ck")) / 1000000), - (clk_get_rate(clk_get_sys(NULL, "mpu_ck")) / 1000000)); + (omap2xxx_clk_get_rate("sys_ck") / 1000000), + (omap2xxx_clk_get_rate("sys_ck") / 100000) % 10, + (omap2xxx_clk_get_rate("dpll_ck") / 1000000), + (omap2xxx_clk_get_rate("mpu_ck") / 1000000)); return 0; }