From patchwork Wed May 13 06:54:42 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 6394401 Return-Path: X-Original-To: patchwork-linux-omap@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 331ED9F32E for ; Wed, 13 May 2015 06:57:10 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 5A7F82042C for ; Wed, 13 May 2015 06:57:09 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 7A99720426 for ; Wed, 13 May 2015 06:57:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753842AbbEMGzL (ORCPT ); Wed, 13 May 2015 02:55:11 -0400 Received: from mailout2.w1.samsung.com ([210.118.77.12]:42940 "EHLO mailout2.w1.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753379AbbEMGzG (ORCPT ); Wed, 13 May 2015 02:55:06 -0400 Received: from eucpsbgm2.samsung.com (unknown [203.254.199.245]) by mailout2.w1.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTP id <0NOA0069Q0JRDF50@mailout2.w1.samsung.com>; Wed, 13 May 2015 07:55:03 +0100 (BST) X-AuditID: cbfec7f5-f794b6d000001495-68-5552f54726bd Received: from eusync4.samsung.com ( [203.254.199.214]) by eucpsbgm2.samsung.com (EUCPMTA) with SMTP id EA.76.05269.745F2555; Wed, 13 May 2015 07:55:03 +0100 (BST) Received: from localhost.localdomain ([10.252.80.64]) by eusync4.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTPA id <0NOA00ELI0JC0J80@eusync4.samsung.com>; Wed, 13 May 2015 07:55:03 +0100 (BST) From: Krzysztof Kozlowski To: Tero Kristo , Mike Turquette , Stephen Boyd , linux-omap@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Krzysztof Kozlowski Subject: [RFT PATCH 3/8] clk: ti: clk-3xxx: Prevent possible ERR_PTR dereference Date: Wed, 13 May 2015 15:54:42 +0900 Message-id: <1431500087-2275-4-git-send-email-k.kozlowski@samsung.com> X-Mailer: git-send-email 1.9.1 In-reply-to: <1431500087-2275-1-git-send-email-k.kozlowski@samsung.com> References: <1431500087-2275-1-git-send-email-k.kozlowski@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFprILMWRmVeSWpSXmKPExsVy+t/xa7ruX4NCDU7eEbN4/cLQ4mPPPVaL y7vmsFnMXtLPYvF0wkU2ix9nulksljztYHNg97jc18vkcefaHjaPvi2rGD2O39jO5PF5k1wA axSXTUpqTmZZapG+XQJXxtRHp1kLzvBWLL3WytrAuJu7i5GTQ0LAROLY5UYmCFtM4sK99Wwg tpDAUkaJIxv5uhi5gOz/jBINbYuZQRJsAsYSm5cvYQNJiAgcZ5RYsaefHSTBLGAo8fPdHzBb WCBAYvnMSWA2i4CqxKsFexlBbF4BN4mlj7pZIbbJSZw8NhnI5uDgFHCXuDRPDMQUAirZ11A3 gZF3ASPDKkbR1NLkguKk9FwjveLE3OLSvHS95PzcTYyQgPq6g3HpMatDjAIcjEo8vDPeBoYK sSaWFVfmHmKU4GBWEuFd+i4oVIg3JbGyKrUoP76oNCe1+BCjNAeLkjjvzF3vQ4QE0hNLUrNT UwtSi2CyTBycUg2MInVzj2etWn9aksXVY6N+qY8WN7te50xdmVtm8v2LWDJVlp7UmhH56N37 C25FK2POHDzh1zLjJ9citeIT7ibeqSzqxe05vlKO7ns0bjoYKvXJ/dmmr3vZ9u6+0uM7LgW8 uarudP5/Qdeizxb8fDJTnVn9/n+snfe5ofr1v7BzKTPeKAffEfutxFKckWioxVxUnAgAFPT5 siQCAAA= Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Provide a wrapper to prevent possible ERR_PTR dereference by clk_get_rate(). The return value of clk_get_sys() was immediately used in clk_get_rate(). The first one may return ERR_PTR and the latter only checks if supplied argument is non-NULL. Signed-off-by: Krzysztof Kozlowski --- drivers/clk/ti/clk-3xxx.c | 18 ++++++++++++++---- 1 file changed, 14 insertions(+), 4 deletions(-) diff --git a/drivers/clk/ti/clk-3xxx.c b/drivers/clk/ti/clk-3xxx.c index 757636d166cf..1db3afff34fb 100644 --- a/drivers/clk/ti/clk-3xxx.c +++ b/drivers/clk/ti/clk-3xxx.c @@ -324,6 +324,16 @@ enum { OMAP3_SOC_OMAP3630, }; +static unsigned long __init omap3xxx_clk_get_rate(const char *clk_name) +{ + struct clk *clk = clk_get_sys(NULL, clk_name); + + if (IS_ERR(clk)) + return 0; + + return clk_get_rate(clk); +} + static int __init omap3xxx_dt_clk_init(int soc_type) { if (soc_type == OMAP3_SOC_AM35XX || soc_type == OMAP3_SOC_OMAP3630 || @@ -359,10 +369,10 @@ static int __init omap3xxx_dt_clk_init(int soc_type) ARRAY_SIZE(enable_init_clks)); pr_info("Clocking rate (Crystal/Core/MPU): %ld.%01ld/%ld/%ld MHz\n", - (clk_get_rate(clk_get_sys(NULL, "osc_sys_ck")) / 1000000), - (clk_get_rate(clk_get_sys(NULL, "osc_sys_ck")) / 100000) % 10, - (clk_get_rate(clk_get_sys(NULL, "core_ck")) / 1000000), - (clk_get_rate(clk_get_sys(NULL, "arm_fck")) / 1000000)); + (omap3xxx_clk_get_rate("osc_sys_ck") / 1000000), + (omap3xxx_clk_get_rate("osc_sys_ck") / 100000) % 10, + (omap3xxx_clk_get_rate("core_ck") / 1000000), + (omap3xxx_clk_get_rate("arm_fck") / 1000000)); if (soc_type != OMAP3_SOC_OMAP3430_ES1) omap3_clk_lock_dpll5();