From patchwork Wed May 13 06:54:47 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 6394361 Return-Path: X-Original-To: patchwork-linux-omap@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id B8661BEEE1 for ; Wed, 13 May 2015 06:56:10 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id E67F22042C for ; Wed, 13 May 2015 06:56:09 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id C78502038A for ; Wed, 13 May 2015 06:56:08 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754301AbbEMG4G (ORCPT ); Wed, 13 May 2015 02:56:06 -0400 Received: from mailout3.w1.samsung.com ([210.118.77.13]:38322 "EHLO mailout3.w1.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754162AbbEMGzV (ORCPT ); Wed, 13 May 2015 02:55:21 -0400 Received: from eucpsbgm1.samsung.com (unknown [203.254.199.244]) by mailout3.w1.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTP id <0NOA005IB0K7CV50@mailout3.w1.samsung.com>; Wed, 13 May 2015 07:55:19 +0100 (BST) X-AuditID: cbfec7f4-f79c56d0000012ee-6b-5552f557361a Received: from eusync4.samsung.com ( [203.254.199.214]) by eucpsbgm1.samsung.com (EUCPMTA) with SMTP id 7C.F8.04846.755F2555; Wed, 13 May 2015 07:55:19 +0100 (BST) Received: from localhost.localdomain ([10.252.80.64]) by eusync4.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTPA id <0NOA00ELI0JC0J80@eusync4.samsung.com>; Wed, 13 May 2015 07:55:19 +0100 (BST) From: Krzysztof Kozlowski To: Tero Kristo , Mike Turquette , Stephen Boyd , linux-omap@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Krzysztof Kozlowski Subject: [RFT PATCH 8/8] clk: ti: clk-7xx: Prevent possible ERR_PTR dereference Date: Wed, 13 May 2015 15:54:47 +0900 Message-id: <1431500087-2275-9-git-send-email-k.kozlowski@samsung.com> X-Mailer: git-send-email 1.9.1 In-reply-to: <1431500087-2275-1-git-send-email-k.kozlowski@samsung.com> References: <1431500087-2275-1-git-send-email-k.kozlowski@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFprELMWRmVeSWpSXmKPExsVy+t/xa7rhX4NCDY7sZLF4/cLQ4mPPPVaL y7vmsFnMXtLPYvF0wkU2ix9nulksljztYHNg97jc18vkcefaHjaPvi2rGD2O39jO5PF5k1wA axSXTUpqTmZZapG+XQJXxp/P3awFH8Uqzq7rYGlgXCjcxcjJISFgIjFx1QsmCFtM4sK99Wxd jFwcQgJLGSV2XX3FDOH8Z5Q4/rSJHaSKTcBYYvPyJWBVIgLHGSVW7OkHSzALGEr8fPcHzBYW 8Jf4c/Ia2FgWAVWJLydvMoPYvAJuEr0/bzJCrJOTOHlsMmsXIwcHp4C7xKV5YiCmEFDJvoa6 CYy8CxgZVjGKppYmFxQnpeca6hUn5haX5qXrJefnbmKEhNSXHYyLj1kdYhTgYFTi4Z3xNjBU iDWxrLgy9xCjBAezkgjv0ndBoUK8KYmVValF+fFFpTmpxYcYpTlYlMR55+56HyIkkJ5Ykpqd mlqQWgSTZeLglGpg1O5eEb5/q/fe9z5K4nGHP2570SV2sEbs8qk90lbc3Ttmx+RyajXMFTwZ aHlxp3vI1XsXTdr27RZg47m9sFwkffFNq+m2E47GFvXzScRNnWJ87tGPWMtLWtvuMDce+HQo PC/Ge+Xd6lNvs75ce8SlFvDl+kL2uI7ZDY+3HN1ZPSW8fW2zFPdOSyWW4oxEQy3mouJEAFa9 X00lAgAA Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The return value of clk_get_sys() was immediately used in clk_set_parent() and clk_set_rate(). The first one may return ERR_PTR and the latter only checks if supplied argument is non-NULL. Signed-off-by: Krzysztof Kozlowski --- drivers/clk/ti/clk-7xx.c | 50 ++++++++++++++++++++++++++++-------------------- 1 file changed, 29 insertions(+), 21 deletions(-) diff --git a/drivers/clk/ti/clk-7xx.c b/drivers/clk/ti/clk-7xx.c index 5d2217ae4478..ce1a77092788 100644 --- a/drivers/clk/ti/clk-7xx.c +++ b/drivers/clk/ti/clk-7xx.c @@ -308,44 +308,52 @@ static struct ti_dt_clk dra7xx_clks[] = { { .node_name = NULL }, }; -int __init dra7xx_dt_clk_init(void) +static void __init dra7xx_dt_clk_abe_dpll_init(void) { int rc; struct clk *abe_dpll_mux, *sys_clkin2, *dpll_ck; - ti_dt_clocks_register(dra7xx_clks); - - omap2_clk_disable_autoidle_all(); - abe_dpll_mux = clk_get_sys(NULL, "abe_dpll_sys_clk_mux"); sys_clkin2 = clk_get_sys(NULL, "sys_clkin2"); dpll_ck = clk_get_sys(NULL, "dpll_abe_ck"); + if (IS_ERR(abe_dpll_mux) || IS_ERR(sys_clkin2) || IS_ERR(dpll_ck)) { + pr_err("%s: failed to configure ABE DPLL!\n", __func__); + return; + } + rc = clk_set_parent(abe_dpll_mux, sys_clkin2); if (!rc) rc = clk_set_rate(dpll_ck, DRA7_DPLL_ABE_DEFFREQ); if (rc) pr_err("%s: failed to configure ABE DPLL!\n", __func__); +} - dpll_ck = clk_get_sys(NULL, "dpll_abe_m2x2_ck"); - rc = clk_set_rate(dpll_ck, DRA7_DPLL_ABE_DEFFREQ * 2); - if (rc) - pr_err("%s: failed to configure ABE DPLL m2x2!\n", __func__); - - dpll_ck = clk_get_sys(NULL, "dpll_gmac_ck"); - rc = clk_set_rate(dpll_ck, DRA7_DPLL_GMAC_DEFFREQ); - if (rc) - pr_err("%s: failed to configure GMAC DPLL!\n", __func__); +static int __init dra7xx_dt_clk_dpll_init(const char *clk_name, + unsigned long rate) +{ + int rc = -EINVAL; + struct clk *clk; - dpll_ck = clk_get_sys(NULL, "dpll_usb_ck"); - rc = clk_set_rate(dpll_ck, DRA7_DPLL_USB_DEFFREQ); - if (rc) - pr_err("%s: failed to configure USB DPLL!\n", __func__); + clk = clk_get_sys(NULL, clk_name); + if (!IS_ERR(clk)) + rc = clk_set_rate(clk, rate); - dpll_ck = clk_get_sys(NULL, "dpll_usb_m2_ck"); - rc = clk_set_rate(dpll_ck, DRA7_DPLL_USB_DEFFREQ/2); if (rc) - pr_err("%s: failed to set USB_DPLL M2 OUT\n", __func__); + pr_err("%s: failed to configure %s!\n", __func__, clk_name); return rc; } + +int __init dra7xx_dt_clk_init(void) +{ + ti_dt_clocks_register(dra7xx_clks); + + omap2_clk_disable_autoidle_all(); + + dra7xx_dt_clk_abe_dpll_init(); + dra7xx_dt_clk_dpll_init("dpll_abe_m2x2_ck", DRA7_DPLL_ABE_DEFFREQ * 2); + dra7xx_dt_clk_dpll_init("dpll_gmac_ck", DRA7_DPLL_GMAC_DEFFREQ); + dra7xx_dt_clk_dpll_init("dpll_usb_ck", DRA7_DPLL_USB_DEFFREQ); + return dra7xx_dt_clk_dpll_init("dpll_usb_m2_ck", DRA7_DPLL_USB_DEFFREQ/2); +}