From patchwork Wed Sep 16 23:48:21 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Suman Anna X-Patchwork-Id: 7201501 Return-Path: X-Original-To: patchwork-linux-omap@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 28234BEEC1 for ; Wed, 16 Sep 2015 23:49:22 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 41F61207B2 for ; Wed, 16 Sep 2015 23:49:21 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 35C90207A4 for ; Wed, 16 Sep 2015 23:49:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753186AbbIPXtS (ORCPT ); Wed, 16 Sep 2015 19:49:18 -0400 Received: from bear.ext.ti.com ([192.94.94.41]:52177 "EHLO bear.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753046AbbIPXtN (ORCPT ); Wed, 16 Sep 2015 19:49:13 -0400 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by bear.ext.ti.com (8.13.7/8.13.7) with ESMTP id t8GNmj1k024948; Wed, 16 Sep 2015 18:48:45 -0500 Received: from DLEE70.ent.ti.com (dlee70.ent.ti.com [157.170.170.113]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id t8GNmjl1010196; Wed, 16 Sep 2015 18:48:45 -0500 Received: from dflp32.itg.ti.com (10.64.6.15) by DLEE70.ent.ti.com (157.170.170.113) with Microsoft SMTP Server id 14.3.224.2; Wed, 16 Sep 2015 18:48:45 -0500 Received: from legion.dal.design.ti.com (legion.dal.design.ti.com [128.247.22.53]) by dflp32.itg.ti.com (8.14.3/8.13.8) with ESMTP id t8GNmjKQ031084; Wed, 16 Sep 2015 18:48:45 -0500 Received: from localhost (irmo.am.dhcp.ti.com [128.247.9.166]) by legion.dal.design.ti.com (8.11.7p1+Sun/8.11.7) with ESMTP id t8GNmi922321; Wed, 16 Sep 2015 18:48:45 -0500 (CDT) From: Suman Anna To: Tony Lindgren CC: Paul Walmsley , , , , Suman Anna Subject: [PATCH 3/4] ARM: OMAP4: hwmod data: Remove legacy IOMMU attr and addrs Date: Wed, 16 Sep 2015 18:48:21 -0500 Message-ID: <1442447302-5246-4-git-send-email-s-anna@ti.com> X-Mailer: git-send-email 2.5.0 In-Reply-To: <1442447302-5246-1-git-send-email-s-anna@ti.com> References: <1442447302-5246-1-git-send-email-s-anna@ti.com> MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP OMAP4 has been DT-boot only for some time, and the legacy-mode device creation logic for IOMMU devices has also been cleaned up, so the dev_attr and address data is no longer required. So, remove these attribute data and hwmod addr space for the IPU & DSP IOMMU devices. Signed-off-by: Suman Anna --- arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 31 ------------------------------ 1 file changed, 31 deletions(-) diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c index 43eebf2c59e2..56586b5d6051 100644 --- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c @@ -30,7 +30,6 @@ #include #include -#include #include #include "omap_hwmod.h" @@ -2088,30 +2087,16 @@ static struct omap_hwmod_class omap44xx_mmu_hwmod_class = { /* mmu ipu */ -static struct omap_mmu_dev_attr mmu_ipu_dev_attr = { - .nr_tlb_entries = 32, -}; - static struct omap_hwmod omap44xx_mmu_ipu_hwmod; static struct omap_hwmod_rst_info omap44xx_mmu_ipu_resets[] = { { .name = "mmu_cache", .rst_shift = 2 }, }; -static struct omap_hwmod_addr_space omap44xx_mmu_ipu_addrs[] = { - { - .pa_start = 0x55082000, - .pa_end = 0x550820ff, - .flags = ADDR_TYPE_RT, - }, - { } -}; - /* l3_main_2 -> mmu_ipu */ static struct omap_hwmod_ocp_if omap44xx_l3_main_2__mmu_ipu = { .master = &omap44xx_l3_main_2_hwmod, .slave = &omap44xx_mmu_ipu_hwmod, .clk = "l3_div_ck", - .addr = omap44xx_mmu_ipu_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -2130,35 +2115,20 @@ static struct omap_hwmod omap44xx_mmu_ipu_hwmod = { .modulemode = MODULEMODE_HWCTRL, }, }, - .dev_attr = &mmu_ipu_dev_attr, }; /* mmu dsp */ -static struct omap_mmu_dev_attr mmu_dsp_dev_attr = { - .nr_tlb_entries = 32, -}; - static struct omap_hwmod omap44xx_mmu_dsp_hwmod; static struct omap_hwmod_rst_info omap44xx_mmu_dsp_resets[] = { { .name = "mmu_cache", .rst_shift = 1 }, }; -static struct omap_hwmod_addr_space omap44xx_mmu_dsp_addrs[] = { - { - .pa_start = 0x4a066000, - .pa_end = 0x4a0660ff, - .flags = ADDR_TYPE_RT, - }, - { } -}; - /* l4_cfg -> dsp */ static struct omap_hwmod_ocp_if omap44xx_l4_cfg__mmu_dsp = { .master = &omap44xx_l4_cfg_hwmod, .slave = &omap44xx_mmu_dsp_hwmod, .clk = "l4_div_ck", - .addr = omap44xx_mmu_dsp_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -2177,7 +2147,6 @@ static struct omap_hwmod omap44xx_mmu_dsp_hwmod = { .modulemode = MODULEMODE_HWCTRL, }, }, - .dev_attr = &mmu_dsp_dev_attr, }; /*